nczempin/NICNAC16-FPGA

Issues

• fix set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets led_OBUF[12]]

  #72 opened 5 years ago by nczempin
  0

• use external (slow) clock

  #57 opened 5 years ago by nczempin
  1

• use shift registers for minimizing pins to control panel

  #71 opened 5 years ago by nczempin
  0

• port to CMOD A7

  #70 opened 5 years ago by nczempin
  0

• use rotary encoder for the rotary switch

  #69 opened 5 years ago by nczempin
  0

• (Basys 3) map 32 pmod lines to memory and i/o

  #55 opened 5 years ago by nczempin
  2

• Digital current loop interface

  #68 opened 5 years ago by nczempin
  0

• (Basys 3) test PMOD inout

  #66 opened 5 years ago by nczempin
  0

• I guess bring back the example debouncer, despite it being in VHDL

  #64 opened 5 years ago by nczempin
  0

• test PMOD input

  #67 opened 5 years ago by nczempin
  0

• find out about PDP-8 major state timing

  #44 opened 5 years ago by nczempin
  0

• (Basys 3) check if JXADC is the correct pin for the dual-purpose port

  #62 opened 5 years ago by nczempin
  2

• Basys 3: PMOD hello world

  #58 opened 5 years ago by nczempin
  0

• use Basys BTN as pushbutton and as control knob

  #54 opened 5 years ago by nczempin
  2

• use serial console for debugging

  #65 opened 5 years ago by nczempin
  0

• memory detection routine

  #63 opened 5 years ago by nczempin
  0

• I_RET

  #23 opened 5 years ago by nczempin
  1

• RUN signal

  #32 opened 5 years ago by nczempin
  0

• (Basys 3)investigate if "abuse" of vga and other pins is possible

  #56 opened 5 years ago by nczempin
  0

• CONCY1 and CONCY2 not really working correctly

  #51 opened 5 years ago by nczempin
  0

• use CONCY1 and CONCY2 rather than my improv

  #61 opened 5 years ago by nczempin
  0

• Fix multi-driven net(s) on d_ffs

  #59 opened 5 years ago by nczempin
  0

• (Basys 3) Hook up board features such as VGA, Serial, keyboard

  #60 opened 5 years ago by nczempin
  0

• turn tri-state bus to muxes

  #49 opened 5 years ago by nczempin
  3

• move inout bus(es) to outermost layer

  #53 opened 5 years ago by nczempin
  1

• front panel logic & sim

  #39 opened 5 years ago by nczempin
  0

• run code in RAM

  #52 opened 5 years ago by nczempin
  0

• glitches

  #35 opened 5 years ago by nczempin
  1

• get some kind of equivalent to a cassette tape working

  #50 opened 5 years ago by nczempin
  0

• separate design out into multiple boards off one expansion bus

  #47 opened 5 years ago by nczempin
  0

• RUN mode is supposed to start after pushing button

  #48 opened 5 years ago by nczempin
  0

• simulate core memory

  #46 opened 5 years ago by nczempin
  0

• make a version without ROM

  #45 opened 5 years ago by nczempin
  0

• Find good simple programs from the dawn of computing

  #31 opened 5 years ago by nczempin
  4

• introduce "return from interrupt" operation

  #43 opened 5 years ago by nczempin
  0

• use individual lines for control knob

  #42 opened 5 years ago by nczempin
  0

• correct address bus(ses) width to 12

  #41 opened 5 years ago by nczempin
  0

• "programmer's manual"

  #40 opened 5 years ago by nczempin
  0

• extend instruction set a little bit

  #38 opened 5 years ago by nczempin
  0

• I_DIO

  #24 opened 5 years ago by nczempin
  0

• stabilization issue out of reset

  #37 opened 5 years ago by nczempin
  0

• interrupt when writing to ROM

  #36 opened 5 years ago by nczempin
  1

• one unified clock divider (reuse instead of duplicate)

  #27 opened 5 years ago by nczempin
  2

• address splitter

  #26 opened 5 years ago by nczempin
  0

• major mode should start as fetch

  #34 opened 5 years ago by nczempin
  0

• internal RAM

  #25 opened 5 years ago by nczempin
  0

• memory outside the cpu; rom and ram

  #33 opened 5 years ago by nczempin
  0

• use real RAM on de10-nano board

  #29 opened 5 years ago by nczempin
  1

• move instruction decoding to control unit

  #30 opened 5 years ago by nczempin
  1

• really learn properly how to use clocks on FPGAs (with PLLs and stuff)

  #28 opened 5 years ago by nczempin
  0