openrisc/orpsoc-cores

Same I2C addres for I2C0 and I2C1 in orpsoc_top.v?

Closed this issue · 2 comments

in de0_nano/src/de0_nano/rtl/verilog/orpsoc_top.v line 45 and 46:
parameter i2c0_sadr = 8'h45,
parameter i2c1_sadr = 8'h45

Why set both i2c0 and i2c1 address to the same value 0x45?
if I try to access i2c1, will it conflict to l2c0?

By the way, is there any existing i2c test c code to refer?

Thanks a lot.

olofk commented

I don't know why they have the same address, but in practice this should not be a problem as they are on different buses

Here you can find a driver for the i2c core https://github.com/mczerski/orpsoc-de0_nano/tree/master/sw/drivers/i2c_master_slave

hi, olofk:

Really thanks to reply my question.
Now I make the I2C module working with the driver.

Thanks again.