os-fpga/litex_reference_designs

Litex Reference Designs provides reference designs created out of IP Catalog using Litex integration capabilities.

Litex Reference Designs

Litex Reference designs is a python package providing example design for Raptor toolchain based upon litex.

├── docs
├── example_designs
│   ├── vexriscv_axi_gpio
│   ├── vexriscv_axi_ram
│   └── vexriscv_hello_world
|    
├── rtl_designs
    ├── vexriscv_axi_ram
    ├── vexriscv_plic_clint
``` └── vexriscv_axi_cdma 


## Raptor_example_designs

This contains example designs with application code to run with LiteX. Every test has a separate README for assistance.