peilin-chen
Ph.D. student at the University of Virginia. His research interests are Digital/Mixed-signal IC Design, AI Chips, and Computer Architecture.
Charlottesville, VA, USA
Pinned Repositories
3d-photo-inpainting
[CVPR 2020] 3D Photography using Context-aware Layered Depth Inpainting
ardupilot
ArduPlane, ArduCopter, ArduRover source
cnn_accelerator
【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
COP-820
Eyeriss Hardware Accelerator for Machine Learning
CPU
单周期 8指令 MIPS32CPU
FaceRecognition-tensorflow
基于TensorFlow训练的人脸识别神经网络
fast-depth
ICRA 2019 "FastDepth: Fast Monocular Depth Estimation on Embedded Systems"
gemmini
Berkeley's Spatial Array Generator
hls_for_cnn_mnist
【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码
Zhulong-RISCV-CPU
CPU Design Based on RISCV ISA
peilin-chen's Repositories
peilin-chen/accelergy
Accelergy is an energy estimation infrastructure for accelerator energy estimations
peilin-chen/acceltran
[TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
peilin-chen/attentionlego
Attentionlego
peilin-chen/bert-on-silicon
Research and Materials on Hardware implementation of BERT (Bidirectional Encoder Representations from Transformers) Model
peilin-chen/booksim2
BookSim 2.0
peilin-chen/cacti
An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model
peilin-chen/Cacti-7.0
peilin-chen/CNN-hw-accelerator
CNN hardware accelerator to accelerate quantized LeNet-5 model
peilin-chen/compiler-and-arch
A list of tutorials, paper, talks, and open-source projects for emerging compiler and architecture
peilin-chen/Cyberrio
peilin-chen/DRAMPower
Fast and accurate DRAM power and energy estimation tool
peilin-chen/DRAMsim3
DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator
peilin-chen/fengbintu.github.io
Github Pages template for academic personal websites, forked from mmistakes/minimal-mistakes
peilin-chen/FPGA-FixedPoint
A Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version. 一个Verilog定点数库，提供算术运算、与浮点数的互相转换，包含单周期和流水线两种实现。
peilin-chen/gamma
peilin-chen/GEMINI-HPCA2024
peilin-chen/grok-1
Grok open release
peilin-chen/long-range-arena
Long Range Arena for Benchmarking Efficient Transformers
peilin-chen/Memory-Design-And-Testing
The project involves the design of a 4X4 (16-bit) SRAM Memory Array using Cadence Virtuoso
peilin-chen/MNSIM-2.0
A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems
peilin-chen/OpenRAM
An open-source static random access memory (SRAM) compiler.
peilin-chen/OpenXRAM
sram/rram/mram.. compiler
peilin-chen/PIMCOMP-NN
peilin-chen/pimsim-nn
peilin-chen/pytorch-cifar100
Practice on cifar100(ResNet, DenseNet, VGG, GoogleNet, InceptionV3, InceptionV4, Inception-ResNetv2, Xception, Resnet In Resnet, ResNext,ShuffleNet, ShuffleNetv2, MobileNet, MobileNetv2, SqueezeNet, NasNet, Residual Attention Network, SENet, WideResNet)
peilin-chen/ramulator
A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf
peilin-chen/ramulator2
Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM standards, emerging RowHammer mitigation techniques). Described in our paper https://people.inf.ethz.ch/omutlu/pub/Ramulator2_arxiv23.pdf
peilin-chen/SRAM-Compute-In-Memory
A collection of research papers on SRAM-based compute-in-memory architectures.
peilin-chen/tinyriscv
A very simple and easy to understand RISC-V core.
peilin-chen/transformer
A TensorFlow Implementation of the Transformer: Attention Is All You Need