Pinned Repositories
caravel_user_project
https://caravel-user-project.readthedocs.io
crypto-rocket-chip
Rocket Chip Generator
OFDM_802_11
IEEE 802.11 OFDM-based transceiver system
OFDM_802_16
IEEE 802.16 OFDM-based transceiver system
OFDM_802_22
OFDM_TX_CR
soric_project
Source-Opened RISCV for Crypto
lwise
RISC-V ISEs for NIST LWC submissions
xcrypto
XCrypto: a cryptographic ISE for RISC-V
xdivinsa
XDIVINSA: eXtended DIVersifying INStruction Agent to mitigate power side-channel leakage
phthinh's Repositories
phthinh/OFDM_802_11
IEEE 802.11 OFDM-based transceiver system
phthinh/OFDM_802_16
IEEE 802.16 OFDM-based transceiver system
phthinh/soric_project
Source-Opened RISCV for Crypto
phthinh/OFDM_802_22
phthinh/OFDM_TX_CR
phthinh/caravel_user_project
https://caravel-user-project.readthedocs.io
phthinh/crypto-rocket-chip
Rocket Chip Generator
phthinh/FABulous
Fabric generator and CAD tools
phthinh/ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
phthinh/libscarv
libscarv: a (software) library of cryptographic reference implementations
phthinh/llsoftsecbook
Low-Level Software Security for Compiler Developers
phthinh/lowrisc-chip
The root repo for lowRISC project and FPGA demos.
phthinh/pp4fpgas
Parallel Programming for FPGAs -- An open-source high-level synthesis book
phthinh/rebecca
Masked hardware verifier
phthinh/Reindeer
PulseRain Reindeer - RISCV RV32I[M] Soft CPU
phthinh/riscv-crypto
RISC-V cryptography extensions standardisation work.
phthinh/riscv-linux
RISC-V Linux Port
phthinh/rvkrypto-fips
FIPS and higher-level algorithm tests for RISC-V Crypto Extension
phthinh/VexRiscvSoftcoreContest2018
phthinh/xdomain-dpa-m23
Cross-Domain DPA Attack on SAML11
phthinh/Thesis
phthinh/ChampSim
ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.
phthinh/coco-alma
phthinh/CVP
Championship Value Prediction (CVP) simulator.
phthinh/hertzbleed
phthinh/lascar
Ledger's Advanced Side-Channel Analysis Repository
phthinh/ORB-Feature-Description
An Implementation of High-Throughput and Area-Optimized Architecture for rBRIEF Feature Extraction
phthinh/verilog-axi
Verilog AXI components for FPGA implementation