/awesome-digital-ic

A collection of great digital IC project/tutorial/website etc..

MIT LicenseMIT

Awesome Digital IC

A collection of great ASIC/FPGA/VLSI project/tutorial/website.

  • ๐Ÿšฉ = Chinese
  • ๐Ÿ“ = Github Project
  • ๐Ÿ“ฝ = With vedio
  • ๐Ÿ‘ถ = Easy to get start with
  • โญ = Recommended
  • ๐Ÿ’ฌ = More Details

Awesome Awesome โญ

Awesome-lists for digital ic.

Github Topics

  • verilog ๐Ÿ“ - Here are 2,566 public repositories matching "verilog" topic...
  • vhdl ๐Ÿ“- Here are 1,766 public repositories matching "vhdl" topic...
  • fpga ๐Ÿ“ - Here are 3,136 public repositories matching "fpga" topic...

Quora Topics

  • verilog ๐Ÿ“ - Here are 2,566 public repositories matching "verilog" topic...
  • vhdl ๐Ÿ“- Here are 1,766 public repositories matching "vhdl" topic...
  • fpga ๐Ÿ“ - Here are 3,136 public repositories matching "fpga" topic...

Projects and IPs

Communication Technology

  • ALEX FORENCICH - Verilog IPs including PCIe/Ethernet/I2C/Uart etc.

  • ALEX FORENCICH - AXI ๐Ÿ“stars - Collection of AXI4 and AXI4 lite bus components. Most components are fully parametrizable in interface widths.

  • TVIP - AXI ๐Ÿ“stars - An UVM package of AMBA AXI4 VIP.

  • PULP-platform - AXI ๐Ÿ“stars - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication.

  • ALEX FORENCICH - AXIS ๐Ÿ“stars - Collection of AXI Stream bus components. Most components are fully parametrizable in interface widths.

  • ALEX FORENCICH - IIC ๐Ÿ“stars - I2C interface components. Includes full MyHDL testbench with intelligent bus cosimulation endpoints.

  • corundum - NIC ๐Ÿ“stars

  • RIFFA - PCIe ๐Ÿ“stars - Reusable Integration Framework for FPGA Acceleratorscommunication.

  • ALEX FORENCICH - UART ๐Ÿ“stars - A basic UART to AXI Stream IP core, written in Verilog with cocotb testbenches.

  • zipcpu - UART ๐Ÿ“stars - A simple, basic, formally verified UART controller.

  • C910 - UART ๐Ÿ“

Information Technology

RISC-V

Others

  • zipcpu โญ๐Ÿ“stars - with detailed comments.
  • openmsp430 - The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  • Nyuzi Processor ๐Ÿ“stars - GPGPU microprocessor architecture.

Tutorials and Courses ๐Ÿ’ฌIntro

  • zipcpu ๐Ÿ‘ถ - Verilog, Formal Verification and Verilator Beginner's Tutorial
  • WORLD OF ASIC โญ - A great source of detailed VLSI tutorials and examples.

HDL

  • More information about hardware description language on Awesome HDL

Verilog Grammar

VHDL Grammar

Chisel

SpinalHDL

Verification

  • Verification Academy - The most comprehensive resource for verification training.
  • Verification Guide - Tutorials with links to example codes on EDA Playground.
  • Doulos - Global training solutions for engineers creating the world's electronics products.
  • testbench - Some training articals for systemverilog.
  • ClueLogic - Providing the clues to solve your verification problems.
  • ChipVerify - A simple and complete set of verilog/System Verilog/UVM tutorials.

Build a CPU

FPGA

Tools

Forums

Online Judge Platforms

  • HDL bits - A collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL).
  • USTC Verilog OJ ๐Ÿšฉ - A verilog online judge service
  • nowcoder - Verilog Part - A verilog oj platform.

Games

PC

  • MHRD - Become a hardware engineer & Build your own CPU from NAND.

web

  • NAND Game - Build a CPU from basic cells by dragging.

Mobile Phone

Discuss: QQ Group 830367636 Email 673538982@qq.com