/my-systemverilog-examples

A place to keep my synthesizable SystemVerilog code snippets and examples.

Primary LanguageVerilogMIT LicenseMIT

my-systemverilog-examples

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A place to keep my synthesizable SystemVerilog code snippets and examples.

Table of Contents,

Documentation and reference,

GitHub Webpage built with concourse ci

SCRIPT TO LAUNCH GTKWAVE

To make things easier when viewing a waveform, I wrote a script that will launch GTKWave with your saved *.gtkw file from Windows WSL, macOS or Linux (Whatever you use).

The script is launch-gtkwave.sh.

A QUICK NOTE ON SYNTHESIS

I declare my ports as follows because that's what the synthesis tools want. Who am I to argue,

    module NAME (
        input             a,     // Input A
        input       [7:0] b,     // Input B
        output reg  [3:0] y      // Output Y
    );

Also, I would stay away from asynchronous design. It can have problems when you synthesize to an FPGA.

    // DO THIS
    always @ (posedge clk) begin
        if (~reset) begin
            ...

    // NOT THIS
    always @ (posedge clk or negedge reset) begin

SYSTEMVERILOG EXAMPLES

All sections in alphabetical order. Each example uses iverilog to simulate and GTKWave to view the output. I also used Xilinx Vivado to synthesize and program these verilog examples on a Digilent ARTY-S7 FPGA development board. These examples also contain info I gathered from other sources.

BASIC CODE

COMBINATIONAL LOGIC

  • ALUs

    • jeff-74x181

      4-bit alu (arithmetic logic unit) and function generator. Provides 16 binary logic operations and 16 arithmetic operations on two 4-bit words. Based on the 7400-series integrated circuits used in my programable-8-bit-microprocessor below.

  • DATA OPERATORS

  • DECODERS & ENCODERS

    • decoder-3-8

      Decoder - Three inputs decodes to 1 of 8 outputs (hot).

    • decoder-to-encoder

      Combining the decoder-3-8 to the encoder-8-3 to prove the input will equal the output.

    • encoder-8-3

      Encoder - Eights inputs (1 hot) encodes to output.

  • MULTIPLEXERS & DEMULTIPLEXERS

    • demux-1x4

      Demultiplexer - One input, four outputs (using a case statement).

    • jeff-74x151

      8-line to 1-line data selector/multiplexer. Based on the 7400-series integrated circuits used in my programable-8-bit-microprocessor below.

    • jeff-74x157

      Quad 2-line to 1-line data selector/multiplexer, non-inverting outputs. Based on the 7400-series integrated circuits used in my programable-8-bit-microprocessor below.

    • mux-4x1

      Multiplexer - Four inputs, one output (using a case statement).

    • mux-to-demux

      Combining the mux-4x1 to the demux-1x4 to prove the input will equal the output (For the selected output).

FPGA DEVELOPMENT BOARDS

  • BUTTONS

    • buttons

      A few different ways to use buttons on a FPGA development board.

SEQUENTIAL LOGIC

SYSTEMS