rehannasar2002/Single-bit-Floating-Adder
To design a 32 bit single precision floating point adder/subtractor on the IEEE 754 standard floating point representations.
Verilog
No issues in this repository yet.
To design a 32 bit single precision floating point adder/subtractor on the IEEE 754 standard floating point representations.
Verilog
No issues in this repository yet.