riscv/riscv-isa-manual

Reference to missing anchor for Figure 16 'menvcfg'

wmat opened this issue · 0 comments

wmat commented

In the following snippet note the blank figure 26 reference:

3.1.18. Machine Environment Configuration Register (menvcfg)
The menvcfg CSR is a 64-bit read/write register, formatted as shown in , that controls certain characteristics of the execution environment for modes less privileged than M.