Gen-Z is an open, scalable, memory semantic universal fabric interconnect which aims to unify and simplify communications among components. RISC-V processor is a free and open ISA intended to unlock processor innovation and increase processor solution and industry agility. Given the open nature of both these technologies, it makes good business sense to enable Gen-Z from the grounds upon a RISC-V processor-based platform. The large address space of RISC-V, secured privileged execution environment and extensions possibilities with the ISA could lead to extensive collaboration with Gen-Z to build processor-integrated Gen-Z and fabric architectures that work together.
Refer to High-level architecture of RISC-V processor integrated Gen-Z solution.
This public repository is created for the further dicusssions and prove concept of RISC-V processor-integrated Gen-Z project.
WORK IN PROGRESS