shanyinshuiyue's Stars
qqwert0/swRDMA
stbrumme/hash-library
Portable C++ hashing library
CMU-SAFARI/DRAM-Bender
DRAM Bender is the first open source DRAM testing infrastructure that can be used to easily and comprehensively test state-of-the-art HBM2 chips and DDR4 modules of different form factors. Six prototypes are available on different FPGA boards. Described in our preprint: https://arxiv.org/pdf/2211.05838.pdf
afkhawaja/amorphos
AmorphOS open source FPGA operating system project
Cyan4973/Writing_Safer_C_code
Collection of articles on good practices and tools to improve C code quality
kactus2/kactus2dev
Kactus2 is a graphical EDA tool based on the IP-XACT standard.
SanjayRai/VCU1525_HLS_acceleration_framework_split_xDMA
VCU1525_HLS_acceleration_framework_split_xDMA
bernardocarvalho/XDMA_v2
FPGAmaster-wyc/verilog_commonModule
verilog通用模块,一些平常经常调用的小模块
liuw666-bruce/p2p_dma_ip_drivers
Modified based on XDMA driver (dma_ip_drivers) of Xilinx, to support P2P DMA with dedicated physical address to/from another device(e.g. based on BAR addr of memory through AXI BYPASS bus in another FPGA).
ultraembedded/core_axi_cache
128KB AXI cache (32-bit in, 256-bit out)
tw93/Pake
🤱🏻 Turn any webpage into a desktop app with Rust. 🤱🏻 利用 Rust 轻松构建轻量级多端桌面应用
TurboPack/SynEdit
SynEdit is a syntax highlighting edit control, not based on the Windows common controls.
MahdiSafsafi/DDetours
Delphi Detours Library
nothings/stb
stb single-file public domain libraries for C/C++
nipo/nsl
VHDL Native Synthesizable Library
gabriel-tenma-white/axi-util
AXI & other utilities
farnamatic/hls_util_lib
In this repo, I collect the handy and useful utilities in HLS C++. One can use them beside an RTL project as well as a uniform HLS design.
sysu-eda/DeepRL-Scheduling
A Deep-Reinforcement-Learning-Based Scheduler for FPGA HLS
sharkdp/dbg-macro
A dbg(…) macro for C++
lirui-shanghaitech/A-convolution-kernel-implemented-by-Vivado-HLS
This project implements a convolution kernel based on vivado HLS on zcu104
Jaffe-/xilinx-bram-wrapper
A flexible RAM wrapper for optimal BRAM utilization
hVHDL/hVHDL_memory_library
Memory library written in VHDL for synthesis
MEGA65/mega65-core
MEGA65 FPGA core
weidingliu/Cache
基于Xilinx FPGA的block ram的写直达与写回cache设计与配套的外部sram控制器
adamwalker/fpga-hashmap
An on-chip RAM based FPGA hashmap
zhu849/FPGA-based-TCAM
Implementation TCAM use distruted RAM by virtex-7 FPGA.
tomverbeure/fpga_quick_ram_update
Quickly update a bitstream with new RAM contents
zhaoyipeng/FMXComponents
Firemonkey Opensource Components
cuciureansergiu/kv260_svm