shecairui

shecairui's Stars

• riscv/learn

  Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.

  43246

• comsec-group/cascade-artifacts

  Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)

  Language:Scala1007

• veyselharun/Turna

  A CFG reconstructor for RISC-V architecture

  Language:Python3

• excalidraw/excalidraw

  Virtual whiteboard for sketching hand-drawn like diagrams

  Language:TypeScript77.6k7.1k

• eugene-tarassov/vivado-risc-v

  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

  Language:Tcl785180

• likmin/riscv-boom-anno

  riscv-boom个人注释

  Language:Scala6

• powerjg/learning_gem5

  Learning gem5 is a work-in-progress book to help gem5 users get started using gem5.

  Language:Python17166

• callmePicacho/Data-Structres

  浙江大学《数据结构》上课笔记 + 数据结构实现 + 课后题题解

  Language:C++3.2k496

• PrincetonUniversity/openpiton

  The OpenPiton Platform

  Language:Assembly612212

• ViktorVitek/HolBA

  Binary analysis in HOL

  1

• riscv-spectre-mitigations/Spectre-v2-v5-mitigation-RISCV

  Language:C91

• OleksiiOleksenko/SpecFuzz

  A tool for detecting Spectre vulnerabilities through fuzzing

  Language:C++3514

• mengguanya/CVA6-source-code-analysis

  CVA6是一款使用System Verilog编写的基于RISC-V指令集架构的六级流水按序单发射处理器，计划通过分析其代码，以达到学习SV语言的目的。

  Language:Shell72

• sycuricon/riscv-spike-sdk

  Run Linux on RISC-V Spike Simulator

  Language:Makefile3916

• sycuricon/starship

  Run rocket-chip on FPGA

  Language:Scala5420

• johnwilander/RIPE

  Buffer overflow testbed, research paper published at ACSAC 2011

  Language:C8626

• riscv-boom/boom-attacks

  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)

  Language:C5817

• shangguanzixuan/pulp-ariane-systemverilog--

  本文是针对ariane核（RISCV核）的代码解读文档

  11

• lapnd/BOOMv3-eager-delay

  Patched version of the RISC-V core BOOM (Berkeley Out-of-Order Machine) w.r.t. Meltdown and Spectre vulnerabilities

  3

• RPTU-EIS/upec-boom-verification-suite

  This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks based on the Unique Program Execution Checking (UPEC) approach.

  Language:Verilog132

• firesim/firesim

  FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

  Language:Scala843218

• mortbopet/Ripes

  A graphical processor simulator and assembly editor for the RISC-V ISA

  Language:C++2.5k272

• bucaps/marss-riscv

  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems

  Language:C++14222

• addrianyy/riscv-cfg

  Generate control flow graph for riscv64 compiled functions.

  Language:Rust2

• XiaoMiku01/fansMedalHelper

  新版B站粉丝牌助手 全自动升级粉丝牌

  Language:Python1.2k784

• maxiwell/SPEC2006_to_LLVMbc

  /home/max/academico/llvm-spec2006

  Language:Shell73

• michaeljclark/rv8

  RISC-V simulator for x86-64

  Language:C++66897

• acama/xrop

  Tool to generate ROP gadgets for ARM, AARCH64, x86, MIPS, PPC, RISCV, SH4 and SPARC

  Language:C29655

• shining1984/PL-Compiler-Resource

  程序语言与编译技术相关资料（持续更新中）

  2k260

• stannehill/Martyr2-Mega-Project-Ideas-List

  Some implementations of programming exercises suggested here: http://www.dreamincode.net/forums/topic/78802-martyr2s-mega-project-ideas-list/

  Language:JavaScript142