shin-yamashita

Pinned Repositories

4th-AI-Edge-Contest
RTL implementation of FPGA accelerator using TFlite delegate mechanism.
Language:VHDL3 1 00
5th-AI-Edge-Contest
RTL implementation of TFlite FPGA accelerator and RISC-V controller.
Language:SystemVerilog4 1 10
6th-AI-Edge-Contest
RTL implementation of TFlite FPGA accelerator and RISC-V controller. 3D Object Detection based on LiDAR Point Clouds.
Language:SystemVerilog10 1 12
mouse
Language:JavaScript00
rv32emc
RTL implementation of RISC-V RV32EMC
Language:C30

shin-yamashita's Repositories

shin-yamashita/6th-AI-Edge-Contest
RTL implementation of TFlite FPGA accelerator and RISC-V controller. 3D Object Detection based on LiDAR Point Clouds.
Language:SystemVerilog10 1 12
shin-yamashita/5th-AI-Edge-Contest
RTL implementation of TFlite FPGA accelerator and RISC-V controller.
Language:SystemVerilog4 1 10
shin-yamashita/4th-AI-Edge-Contest
RTL implementation of FPGA accelerator using TFlite delegate mechanism.
Language:VHDL3 1 00
shin-yamashita/rv32emc
RTL implementation of RISC-V RV32EMC
Language:C30
shin-yamashita/mouse
Language:JavaScript00