Pinned Repositories
rocket-chip
Rocket Chip Generator
riscv-pk
RISC-V Proxy Kernel
freedom-u-sdk
Freedom U Software Development Kit (FUSDK)
Adafruit_ILI9341
Library for Adafruit ILI9341 displays
cvw
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
learn-fpga
Learning FPGA, yosys, nextpnr, and RISC-V
Project-Zipline
Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
riscv-v-spec
Working draft of the proposed RISC-V V vector extension
verilator
Verilator open-source SystemVerilog simulator and lint system
verilator
Verilator open-source SystemVerilog simulator and lint system
solomatnikov's Repositories
solomatnikov/Adafruit_ILI9341
Library for Adafruit ILI9341 displays
solomatnikov/cvw
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
solomatnikov/learn-fpga
Learning FPGA, yosys, nextpnr, and RISC-V
solomatnikov/Project-Zipline
Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
solomatnikov/riscv-v-spec
Working draft of the proposed RISC-V V vector extension
solomatnikov/verilator
Verilator open-source SystemVerilog simulator and lint system