someone755/ddr3-controller
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
Verilog
Issues
- 1
Question for code
#4 opened by huajianyibeijiu - 1
Unsupported frequency error generation
#3 opened by acajic - 11
Read/write test error
#2 opened by Tolar626 - 3
ODT Support ?
#1 opened by TheAnimatrix