sprsr

Digital Design, CPU & Accelerator Architecture, Home Servers & Efficiency, OS.

A CompanySomewhere

Pinned Repositories

.vim_config
My customized Vim Configuration focused on productivity and flexibility
Language:Vim Script1 1 00
4xSA_Cache
A Customizable Set Associative Cache intended for use in https://github.com/sprsr/rv32_processor
Language:Verilog1 1 00
deploy_jellyfin_docker
Language:Batchfile2 1 00
dwm
My Custom DWM Configuration
Language:C10
gentooAarch64
Language:Shell10
iping
Experimentation with Ethernet Traffic
Language:C10
machine_stack
1 1 00
oz_node_boot_conf
1 1 00
rv32_pipeline
Risc V Processor
Language:Verilog11
spek_cpu
A small single core Risc V CPU supporting RV32-I with a 64KB Cache
Language:Verilog1 1 00

sprsr's Repositories

sprsr/.vim_config
My customized Vim Configuration focused on productivity and flexibility
Language:Vim Script1 1 00
sprsr/dwm
My Custom DWM Configuration
Language:C10
sprsr/iping
Experimentation with Ethernet Traffic
Language:C10
sprsr/machine_stack
1 1 00
sprsr/oz_node_boot_conf
1 1 00
sprsr/python_scripting_tips
To remember some good python scripting practices to increase productivity
Language:Python1
sprsr/st
My Custom St Repository
Language:C1
sprsr/counter
basic counter module
Language:Verilog
sprsr/init.lua
sprsr/rv32
PicoRV32 - A Size-Optimized RISC-V CPU