Issues
- 3
Unable to build just the ice-v CPU
#270 opened by MrJake222 - 3
- 0
- 0
- 0
$$ directives in board file Verilog are not ignored in code disabled by preprocessor test or /* */
#268 opened by FPGAEveryday - 8
How to set the subroutine permissions for the dot access of an algorithm input?
#222 opened by at91rm9200 - 6
- 14
Can't compile Silice on Arch Linux
#255 opened by Popolon - 3
Silice installs files back into the build directory
#240 opened by yurivict - 0
- 3
**ASSERT FAILED** (if_deadend && !if_statless) || !if_deadend, file ..Algorithm.cpp, line 4078
#257 opened by tommythorn - 0
inouts cannot be bound using a bit-select syntax
#258 opened by sylefeb - 4
ULX3S sdram_memtest sample build fails.
#256 opened by gkankanh - 1
uart_tx and uart_rx seem to have wrong direction in the Verilog framework file for the ECPIX5-Board
#254 opened by at91rm9200 - 2
- 0
Error initialising bram not brom
#251 opened by rob-ng15 - 35
- 0
Name shadowing
#250 opened by sylefeb - 4
Unexpected code execution.
#249 opened by at91rm9200 - 7
Empty FSM states could be optimized
#247 opened by suarezvictor - 2
- 0
Combining declaration and always assignment
#244 opened by rob-ng15 - 2
- 1
interleaving pipelined algorithms in host pipelines
#242 opened by sylefeb - 0
pipeline sync
#241 opened by sylefeb - 1
Double check initializers for tables
#238 opened by sylefeb - 0
Combinational loops may be wrongly detected when passing entire groups as parameters
#237 opened by sylefeb - 0
Expression trackers in algorithms body lead to confusing (albeit correct) semantics
#235 opened by sylefeb - 6
- 2
Recursive algorithm support?
#233 opened by ColonelPhantom - 3
Possible preprocessor problem.
#232 opened by at91rm9200 - 1
Missing template, dualport bram with byte masking
#229 opened by rob-ng15 - 0
- 0
Export / import
#227 opened by sylefeb - 8
Altera Cyclone IV EP4CE6E22C8N
#223 opened by ShervinShokouhi - 1
Versioning
#226 opened by sylefeb - 3
Silice terminates without error message, if a subroutine contains two output parameters.
#225 opened by at91rm9200 - 2
0.7 seconds delay after reset on the icestick.
#221 opened by at91rm9200 - 18
How to use newlib to compile c code?
#219 opened by ShervinShokouhi - 0
Update compilation scripts
#220 opened by sylefeb - 2
Difficulties to download Silice.
#218 opened by at91rm9200 - 0
- 13
File extension
#206 opened by zipotron - 12
build.v: No such file or directory?
#212 opened by ShervinShokouhi - 4
Enhancement Request: Import 16 bit binary files
#210 opened by rob-ng15 - 8
ULX3S reboot issue
#207 opened by nono2357 - 0
Binding on outputs is limited
#208 opened by sylefeb - 0
- 2
- 0
Able to read and use inputs to algorithms, but not pass same to other algorithms
#202 opened by rob-ng15