tefantasy

CULS

GPU-based logic synthesis tool

abc

ABC: System for Sequential Logic Synthesis and Formal Verification

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

clockTree

Clock Tree Routing

CorrNet

Unofficial implementation of paper "Video Modeling with Correlation Networks"

lbmCL

OpenCL-based Fluid Simulation by Lattice Boltzmann Method

MSc_project

neovim_config

My neovim config files

tefantasy.github.io

WeightedCorrelationExtension

Rudimentary PyTorch CUDA extension of weighted correlation operation and layer proposed in paper "Video Modeling with Correlation Networks"

tefantasy/CorrNet

Unofficial implementation of paper "Video Modeling with Correlation Networks"

tefantasy/neovim_config

My neovim config files

tefantasy/WeightedCorrelationExtension

Rudimentary PyTorch CUDA extension of weighted correlation operation and layer proposed in paper "Video Modeling with Correlation Networks"

tefantasy/abc

ABC: System for Sequential Logic Synthesis and Formal Verification

tefantasy/chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

tefantasy/clockTree

Clock Tree Routing

tefantasy/lbmCL

OpenCL-based Fluid Simulation by Lattice Boltzmann Method

tefantasy/MSc_project

tefantasy/tefantasy.github.io

tefantasy/TranstoryXL

Implementation of "TranstoryXL: Tell Stories from Image Streams"