cpu-architecture
There are 36 repositories under cpu-architecture topic.
arm-university/Introduction-to-Computer-Architecture-Education-Kit
Gain an understanding of the fundamental topics and concepts of computer architecture including the application of these with modern Arm processors
alirezakay/RISC-CPU
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
arm-university/Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers
A textbook on understanding system on chip design
MaorAssayag/Architecture-of-CPU-projects
VHDL , ModelSIM, Quartus, FPGA, Image Processing
RossComputerGuy/SherwoodArch
The Sherwood Architecture is a custom 64-Bit RISC based CPU architecture.
laskarelias/upatras-riscv
Μια ενδεικτική υλοποίηση RISC-V επεξεργαστή και ενός υποστηρικτικού Assembler - Διπλωματική εργασία στο Τμήμα Μηχανικών Η/Υ και Πληροφορικής, Πανεπιστήμιο Πατρών / An Indicative RISC-V CPU Implementation and an Accompanying Assembler - Master's Diploma Thesis at the Computer Engineering and Informatics Department (CEID), University of Patras
lolguy91/SCAP
the Stupidest CPU Arch Possible
codehasan/MyArch
📱 An app to view all supported ABI of the running device
MIPT-ILab/MDSP
[2009 – 2012] MDSP: functional simulation of a Multimedia Digital Signal Processor
JimCownie/CpuFun
Code snippets for the CpuFun blog
Kammann123/ev21g1
General purpose processor with a RISC architecture and a five stage pipeline, implemented on a Cyclone IV FPGA using a development board
MartinBrugnara/archetypum
Tomasulo algorithm visualizer
uros-bojanic/8-bit-computer
[Computer Engineering] Programmable 8-bit computer based on von Neumann architecture, designed and implemented from scratch in Logisim.
ewpratten/Dirobium
The virtual CPU (and emulator) built for hobbyists
oceanwebturk/ankaosx
OceanWebTurk AnkaOS X
onegentig/VUT-FIT-INP2022-projekt1
První projekt (CPU s brainfuck-like ISA) z předmětu Návrh počítačových systémů (INP), třetí semestr bakalářského studia BIT na FIT VUT/BUT, ak.rok 2022/2023
SexySparrow/RISC_V
RISC-V CPU arhitecture
arinaivanova/logisim-cpu
WIP: CPU implemented in LogiSim from NAND gates.
erwanregy/Cache-Simulation
CPU Cache Simulation using gem5
erwanregy/NoC-Simulation
Network-on-Chip Simulation using Noxim
garrettknuf/Caltech10-CPU
8-bit Harvard Architecture CPU implemented in ABEL
pentolope/cookie
A custom CPU for an FPGA
Sayemum/CS261-Y86-CPU-Simulator
My semester-long project for CS261 - Computer Systems at James Madison University where I constructed a cpu simulator using a smaller version of x86 called y86.
simon-gardier/cpu-design
📟 32 bits CPU design
srki/RISC-V-Simulator
Assembler and Simulator for RISC-V RV32I instruction set that runs entirely in web browser.
ThiagoDSMarcelino/cpu-architecture
16-bit CPU with specific Assembler for Assembly codes capable of controlling a 32x32 led screen
TotoroTron/495_CPU
A simple 8-bit CPU.
almidi/VHDL_Charis_4
Basic VHDL projects gradually creating a pipelined CPU running Charis4 instruction set.
cedrickchee/nand2tetris
Solutions for http://www.nand2tetris.org/
DebasishPanda529/EE309_IITB-RISC
Github repo containing all the VHDL files for the EE309 course project involving designing a 16-bit, 6-staged pipelined processor based on the RISC ISA.
Haaris-RTL/8-bit-CPU
RTL code of an 8-bit CPU designed in Verilog with a separate file for each module.
Hridxyz/Microprocessor-Assembly-Language
A repository of my assembly language learning journey, featuring programs that illustrate the core principles of microprocessor operations and low-level coding.
mohdfahad12328/scpu
a smiple 8bit cpu implemented in verilog and tested on FPGA for understanding how CPU works
ParkerTenBroeck/MyCPU_16bit
A 16 bit SAP-1 CPU that I designed in grade 10 designed in logisim
Zardoz89/trillek-computer
Trillek Virtual Computer specs