half-adder
There are 23 repositories under half-adder topic.
nxbyte/Verilog-Projects
This repository contains source code for past labs and projects involving FPGA and Verilog based designs
bespoyasov/binary-full-adder-in-the-game-of-life
Binary adder implementation in the Game of Life written in JavaScript using canvas.
Stavros/Multiplier4bit
A 4bit Multiplier in VHDL
Zannatul-Naim/Digital-System-Design
Digital System Design Lab Codes using Verilog
DatDarkAlpaca/dat-emulation-sandbox
A simulation where I can connect virtual logic gates and build virtual CIs.
shane-staret/SimpleBinaryCalculator
A Java binary calculator based on a system of gates
aliansgp/VHDL_Adders
Different adders code in VHDL and Comparison
ammarmalik17/Verilog_Adders
This repository contains Verilog HDL implementations of Half Adders, Full Adders, and 4-bit Adders, designed at three different abstraction levels: Gate Level, Dataflow Level, and Behavioral Level. These designs are fundamental to digital electronics, and this project showcases the versatility of Verilog in modeling and simulating digital circuits.
ichko/nand-to-tetris
This repository contains HWs and material from the nand to tetris course
imvickykumar999/Logical-Redstone-Reloaded
Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/
jgesc/VerilogTests
A repository for some modules I made while learning Verilog
joeymaillette04/VHDL
VHDL implementations of half-adders, full-adders, and a 4-bit adder for digital circuit design
mcquerol/electronic-systems
Various electronic systems including ADC/DAC, filters, and simulations using NI Multisim.
rahul21316/verilog-adders
All the various adders in Verilog!
scriptographers/CS254-Assignment-3
Assignment 3, Digital Logic Design Lab, Spring 2021, IIT Bombay
Grv-Singh/Digital-Systems-Design
Playing with ⚡ logic gates to make corresponding ✔ decision making circuits solving 🔌 electronic challenges at hand 🚦
PoulamiSarkar24/VHDL
This Repository contains the basic VHDL code for different circuits we learn in Computer Architecture. All the provided codes run on EdaPlayground platform, thus divided into testbench code (that goes under testbench.vhd window )and design code (goes under design.vhd) for clarity.
VarshithGovi/Half-Adder-Design-Verilog
A compact Verilog project implementing a half-adder with gate-level modeling, featuring a detailed testbench for functional verification and simulation.
daedalus/bitlogicemu
bitwise operation examples
krish1925/CS-M152A
Labwork on Logic Design implementation in Verilog on a Basys3 FPGA Module
newajsharif91/Verilog_HDL_Digital-System-Design
CSE-2112 Digital Syatem Design LAb
senavs/BitJoy
:heavy_check_mark: Bit, Bytes and Logical Gates Abstraction
shane-staret/TwosComplementer
A Java program that converts a binary number into it's two's complement equivalent. This is used within the SimpleBinaryCalculator repository.