high-level-synthesis

There are 123 repositories under high-level-synthesis topic.

  • stencilflow

    Language:Python15
  • shiftNet

    Language:C++13
  • libmem

    Language:C10
  • LSTM_HLS

    Language:C++4
  • HLS-Cryptography-Accelerator

    A crypto accelerator written for HLS to an FPGA that actually makes it slower than running it on your computer

    Language:Assembly16
  • DaCH

    DaCH: dataflow cache for high-level synthesis.

    Language:C++15
  • HLS_NoC

    HLS code for Network on Chip (NoC)

    Language:C++14
  • HLS_for_CNN

    This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.

    Language:C13
  • HLS_BLSTM

    The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))

    Language:Objective-C11
  • bream

    Bream is a subset/dialect of Scheme that is compiled to run on an alternative platform. More details & initial sources will follow soon.

    Language:Scheme11
  • fold

    fold

    high abstraction synthesis

    Language:Python10
  • DRIM4HLS

    DUTH RISC V Microprocessor for High Level Synthesis

    Language:C++10
  • HLS_hls4ml_Tutorial

    HLS & hls4ml Tutorial

    Language:Jupyter Notebook10
  • anyhls

    High-Level Synthesis with Partial Evaluation

    Language:CMake10
  • flower

    A Comprehensive Dataflow Compiler for High-Level Synthesis

    Language:CMake9
  • hls-crypto

    FPGA Cryptography for High-Level Synthesis

    Language:C++9
  • High-Performance-Karatsuba-Multiplier-HLS-FPGA

    Implement High-Performance Karatsuba Multiplier in High-Level Synthesis (HLS) for FPGA Based on Recursive Template

    Language:Ada9
  • HLS_FFT

    Design of High-Level Synthesis of Xilinx FFT IP core via FFT library

    Language:Tcl8
  • nbody_hls

    Implementation of the N^2-formulation of N-body simulation with Vivado HLS for SDAccel platforms.

    Language:C++8
  • db4hls

    Repository of DB4HLS. A database of design space exploration in high-level synthesis.

    Language:Python7
  • stencil_hls

    Implementation of time and space-tiled stencil in Vivado HLS.

    Language:C++7
  • Hardware-Software-SHA-3-HLS

    HLS SHA-3 Accelerator

    Language:C7
  • visual-system-integrator

    Visual System Integrator - Accelerate your embedded development

    Language:Python7
  • legup-tuner

    Autotuning High-Level Synthesis for FPGAs, published @ ReConFig '17

    Language:PostScript7
  • svpp

    Mixing HLS and Backend Versions in Vitis

    Language:C++6
  • DP-HLS

    HLS-based framework to accelerate the implementation of 2-D DP kernels on FPGA

    Language:C++6
  • blake3-fpga

    BLAKE3 on FPGA

    Language:C++6
  • fuzzing-hls

    Finding bugs in high-level synthesis tools using Csmith to generate random, valid C programs.

    Language:C6
  • flames

    Flexible Linear Algebra with Matrix-Empowered Synthesis (for Vitis HLS)

    Language:C++4
  • MSOC2020

    Multimedia SoC design (2020 Fall)

    Language:C4
  • zynq-axi-tutorial

    A tutorial on the usage of AXI4-Lite and AXI4-Stream Interfaces on HW Accelerators generated through High-Level Synthesis (HLS)

    Language:Tcl4
  • legacy-dynamatic

    NOTE: this repository is obsolete, please checkout https://github.com/EPFL-LAP/dynamatic. A fork of the Dynamatic HLS compiler from https://github.com/lana555/dynamatic

    Language:C++3
  • Vitis_High_Level_Synthesis_Training

    Vitis High Level Synthesis Introduction

    Language:C++3