Pinned Repositories
ice_cutter_pcb
The PCB for the ice cutter project
data-extraction
This represents data extracted according to this format https://github.com/South-Africa-Government-Procurement/project-docs/wiki/Data-models-and-standards#abstract-records-of-amounts
Data-cleaning
This represents data extracted according to this format https://github.com/South-Africa-Government-Procurement/project-docs/wiki/Data-models-and-standards#abstract-records-of-amounts
eportfolio
Portfolio website made using HTML, CSS, JS and Bootstrap.
FERS
Flexible Extensible Radar Simulator
ISD-PO
A parallel implementation of an Image Steganography Decode in simulation on a Nexys-A7 FPGA. The decoder expects images encoded with the least significant bit decoder.
LoT-system
A Light of Things (LoT) Transmitter-Reciever System implemented using STM32f0Discovery boards.
perchscale
QP4ISAR
A Quick-look processor for ISAR imaging of sea vessels
SHARC-buoy-data-transmission
Encrypt and compress data read from an ICM-20948 sensor onboard the STM32F0-discovery. Designed for use in the SHARC ice buoy project.
tristynferreiro's Repositories
tristynferreiro/SHARC-buoy-data-transmission
Encrypt and compress data read from an ICM-20948 sensor onboard the STM32F0-discovery. Designed for use in the SHARC ice buoy project.
tristynferreiro/LoT-system
A Light of Things (LoT) Transmitter-Reciever System implemented using STM32f0Discovery boards.
tristynferreiro/perchscale
tristynferreiro/QP4ISAR
A Quick-look processor for ISAR imaging of sea vessels
tristynferreiro/Data-cleaning
This represents data extracted according to this format https://github.com/South-Africa-Government-Procurement/project-docs/wiki/Data-models-and-standards#abstract-records-of-amounts
tristynferreiro/eportfolio
Portfolio website made using HTML, CSS, JS and Bootstrap.
tristynferreiro/FERS
Flexible Extensible Radar Simulator
tristynferreiro/ISD-PO
A parallel implementation of an Image Steganography Decode in simulation on a Nexys-A7 FPGA. The decoder expects images encoded with the least significant bit decoder.