tristynferreiro

Pinned Repositories

ice_cutter_pcb
The PCB for the ice cutter project
0 2 00
data-extraction
This represents data extracted according to this format https://github.com/South-Africa-Government-Procurement/project-docs/wiki/Data-models-and-standards#abstract-records-of-amounts
2 4 11839
Data-cleaning
This represents data extracted according to this format https://github.com/South-Africa-Government-Procurement/project-docs/wiki/Data-models-and-standards#abstract-records-of-amounts
00
eportfolio
Portfolio website made using HTML, CSS, JS and Bootstrap.
Language:CSS00
FERS
Flexible Extensible Radar Simulator
Language:C++0 0 00
ISD-PO
A parallel implementation of an Image Steganography Decode in simulation on a Nexys-A7 FPGA. The decoder expects images encoded with the least significant bit decoder.
Language:VHDL0 1 01
LoT-system
A Light of Things (LoT) Transmitter-Reciever System implemented using STM32f0Discovery boards.
Language:C2 1 00
perchscale
Language:C++2 1 00
QP4ISAR
A Quick-look processor for ISAR imaging of sea vessels
Language:MATLAB3 1 00
SHARC-buoy-data-transmission
Encrypt and compress data read from an ICM-20948 sensor onboard the STM32F0-discovery. Designed for use in the SHARC ice buoy project.
Language:C5 1 01

tristynferreiro's Repositories

tristynferreiro/SHARC-buoy-data-transmission
Encrypt and compress data read from an ICM-20948 sensor onboard the STM32F0-discovery. Designed for use in the SHARC ice buoy project.
Language:C5 1 01
tristynferreiro/QP4ISAR
A Quick-look processor for ISAR imaging of sea vessels
Language:MATLAB3 1 00
tristynferreiro/LoT-system
A Light of Things (LoT) Transmitter-Reciever System implemented using STM32f0Discovery boards.
Language:C2 1 00
tristynferreiro/perchscale
Language:C++2 1 00
tristynferreiro/Data-cleaning
This represents data extracted according to this format https://github.com/South-Africa-Government-Procurement/project-docs/wiki/Data-models-and-standards#abstract-records-of-amounts
00
tristynferreiro/eportfolio
Portfolio website made using HTML, CSS, JS and Bootstrap.
Language:CSS00
tristynferreiro/FERS
Flexible Extensible Radar Simulator
Language:C++0 0 00
tristynferreiro/ISD-PO
A parallel implementation of an Image Steganography Decode in simulation on a Nexys-A7 FPGA. The decoder expects images encoded with the least significant bit decoder.
Language:VHDL0 1 01