Pinned Repositories
Implementation-of-Simplified-TCP-using-the-NIOS-II-in-Intel-DE2i-150-FPGA-board.
Created Qsys system that includes Nios II, Triple-Speed Ethernet IP Core, SGDMA controller and other hardware components for transmit and receive operation. Two Phase-Locked Loop modules are added to the design to generate clocks with different frequencies to make the Triple-Speed Ethernet system (which implements the MAC function) work properly at 10/100/1000 Mbps. After building the hardware system and downloading the circuit onto the FPGA, run an application program written in C language. Based on the inputs from the board it establishes and closes the TCP connection, transmit and receive data frames from the Ethernet port of the board. Ethernet frames are transmitted based on Stop and Wait Protocol and Altera Timer core is added to re-transmit frames after Timeout.
introductory-guide-to-chisel
「Chiselを始めたい人に読んで欲しい本」のサンプルコード用リポジトリ
J1Sc
A reimplementation of a tiny stack CPU
tvm
My experiences of using TVM compiler on Raspberry Pi 3 Model B
ZYBO_IoT_Vivado
This is a Vivado project to create an IoT device with ZYBO (Zynq).
tzechienchu's Repositories
tzechienchu/advanced-rest-api-lecture-codes
Start and end codes for the lectures of our Advanced REST APIs with Flask and Python course
tzechienchu/AsyncProgramming
Lets Learn Asynchronous Programming
tzechienchu/bluepill-serial-monster
USB to 3 Port Serial (UART) adapter firmware for STM32 Blue Pill.
tzechienchu/core_ddr3_controller
A DDR3 memory controller in Verilog for various FPGAs
tzechienchu/embedded-cli-1
Simple CLI with history and autocompletion for embedded systems (like Arduino or STM32)
tzechienchu/FlashDB
An ultra-lightweight database that supports key-value and time series data | 一款支持 KV 数据和时序数据的超轻量级数据库
tzechienchu/FPGAandUSB3.0
tzechienchu/fx3fun
Treat your Cypress FX3 a little like a logic analyzer or software defined bus.
tzechienchu/hid-examples
Examples to accompany the book "Haskell in Depth"
tzechienchu/interrupt
A community for embedded software makers.
tzechienchu/jameswcooper
Example Python code
tzechienchu/LoRa-E5-LoRaWAN-End-Node
tzechienchu/LoRa-E5-Mini-EndNode
tzechienchu/mastering-Go-3rd
Source code for Mastering Go, 3rd edition
tzechienchu/micropython
MicroPython - a lean and efficient Python implementation for microcontrollers and constrained systems
tzechienchu/modbus
Very simple modbus for STM32 HAL FreeRTOS
tzechienchu/Modbus-STM32-HAL-FreeRTOS
Modbus TCP and RTU, Master and Slave for STM32 using Cube HAL and FreeRTOS
tzechienchu/oh
Verilog library for ASIC and FPGA designers
tzechienchu/pubsub-c
Pub/Sub library for C
tzechienchu/Python-Architecture-Patterns
Code Repository for Python Architecture Patterns, Created by Packt
tzechienchu/PythonPlugin
A plugin for open-ephys enabling the insertion of Cython into the open-ephys signal chain.
tzechienchu/rest-apis-flask-python
A small repository of projects built in my course, REST APIs with Flask and Python.
tzechienchu/soft-uart
Multi Software Serial (UART) for STM32
tzechienchu/Speed-up-your-Python-with-Rust
Speed up your Python with Rust, published by Packt
tzechienchu/stm32-hal-quickstart
A default template for STM32-HAL
tzechienchu/stm32-usart-uart-dma-rx-tx
STM32 examples for USART using DMA for efficient RX and TX transmission
tzechienchu/STM32_AS7341
Conversion of Adafruit's AS7341 to work with STM32
tzechienchu/tkdocs
Sample code from TkDocs.com
tzechienchu/tock-project
tzechienchu/VexRiscV_with_HW-GDB_Server
VexRiscV system with GDB-Server in Hardware