ufrisk/pcileech-fpga
FPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software
Verilog
Issues
- 1
Why using 7 Series FPGAs Integrated Block for PCI Express ip core instead of others?
#171 opened by FlyingCatSSS - 1
MPVDMA
#170 opened by MarceloSAffonso - 6
- 1
zdma ip core seems to be broken
#169 opened by YideTian - 1
How to fix disconnect to the fpga board
#167 opened by Esc3ape - 2
Leetdma Abnormal speed measurement
#166 opened by GRRENY - 0
Leetdma Abnormal speed measurement
#165 opened by GRRENY - 1
memory issue
#164 opened by wilko236 - 1
- 0
Is it possible to limit the number and frequency of TLPs that are actively sent on the software side?
#162 opened by zr5177 - 5
Advice Request: Ported project to new board and 1Gbit Ethernet, how can I make it faster?
#160 opened by Gbps - 2
Failed reading a memory display issue
#146 opened by kirysnik - 20
- 6
How to fully customize PCIe configuration space?
#132 opened by zr5177 - 2
pls help me
#158 opened by faxvs - 3
Emulating any given device
#130 opened by Haseeb18P - 1
This device cannot be started. (Code 10)
#157 opened by Strimsnaiper - 8
Information about LeetDma
#119 opened by Remashes - 2
working on zynq?
#123 opened by Forever-APEX - 3
- 1
Unable to retrieve required Device PCIe ID
#140 opened by PrideIsLife - 9
why the firmware speed will be lower if i make all config space from .coe file?
#139 opened by xingkong158 - 1
PCIe 1x squirrel card (FPGA -3rd party) is not enumerated when we connected Behind Gatkex Creek Card PCIe slot (x4)
#138 opened by sridhaleech - 1
Does the PCIe Squirrel Card Function During Pre-Boot Stage (MRC or PEI) before Booting Up to DXE or OS phase
#137 opened by sridhaleech - 3
enable jtag
#131 opened by maybnt - 4
Why Tiny alog? How to fix this
#143 opened by CottonCollecter - 3
- 1
- 3
about memory issue
#149 opened by CaS1ow - 4
0x55556666 padding in the middle of receiving a TLP?
#155 opened by andreiw - 1
Question: Can I effectively use the Screamer PCIe Squirrel in a single PC setup.
#154 opened by Hypsster - 3
Xilinx PCIe parameters
#152 opened by andreiw - 3
Q on receiving data from FPGA
#153 opened by andreiw - 1
Q about TLP completion timeout
#151 opened by andreiw - 1
Does the firmware support Kintex 7 Chips?
#150 opened by xiaonian233 - 11
- 2
- 2
Ways to detect current firmware version?
#144 opened by taylor310 - 2
M.2 NVMe M-key to PCIe adapter issues
#141 opened by IgnPilv - 1
Pcileech on altera fpga
#136 opened by CottonCollecter - 6
Base Address Register [AMD]
#133 opened by ekknod - 5
How to improve data port speed?
#134 opened by CottonCollecter - 2
the schematic?
#121 opened by wudehua2016 - 6
How to activate BusMaster ?
#128 opened by Youssix - 5
Modifying CFG space
#129 opened by Haseeb18P - 1
Tb file for this project
#126 opened by maybnt - 5
- 2
dump
#125 opened by PEPSIMAN089 - 1
firmware
#124 opened by PEPSIMAN089 - 1
What about LurkerDMA?
#120 opened by StarSherron