Pinned Repositories
alamoutistbc
alamourt stbc simulation un matlab
alice5
SPIR-V fragment shader GPU core based on RISC-V
AUK-V
RISCV processor (RV32I)
AUK-V-Aethia
AUK-V RV32I CPU
calibre-library
My Calibre library
codegen-rtl
Rtl code generator codes for FPGA design
Machine-learning-datasets
List and links to the best known datasets on audio processing
sramcontroller
Simple SRAM controller , tested on ALTERA DE1 board
stereo_vision_core_bad
It is a stereo vision code i developed when i was learning verilog.It is not a practical one, yet its another code to read
veeYceeY's Repositories
veeYceeY/AUK-V-Aethia
AUK-V RV32I CPU
veeYceeY/Machine-learning-datasets
List and links to the best known datasets on audio processing
veeYceeY/alamoutistbc
alamourt stbc simulation un matlab
veeYceeY/AUK-V
RISCV processor (RV32I)
veeYceeY/codegen-rtl
Rtl code generator codes for FPGA design
veeYceeY/sramcontroller
Simple SRAM controller , tested on ALTERA DE1 board
veeYceeY/stereo_vision_core_bad
It is a stereo vision code i developed when i was learning verilog.It is not a practical one, yet its another code to read
veeYceeY/alice5
SPIR-V fragment shader GPU core based on RISC-V
veeYceeY/calibre-library
My Calibre library
veeYceeY/Fixes
Fixes found for problems encountered
veeYceeY/gplgpu
GPL v3 2D/3D graphics engine in verilog
veeYceeY/HDMI
Hdmi using oserdes
veeYceeY/hw
RTL, Cmodel, and testbench for NVDLA
veeYceeY/keystone
Keystone Enclave (QEMU + HiFive Unleashed)
veeYceeY/linux
Linux kernel source tree
veeYceeY/linux-xlnx
The official Linux kernel from Xilinx
veeYceeY/machine-learning-mindmap
A mindmap summarising Machine Learning concepts, from Data Analysis to Deep Learning.
veeYceeY/magic
Magic VLSI Layout Tool
veeYceeY/pinOS
Designing simple OS , for fun and learn osdev
veeYceeY/Quadrature-encoder_test_game
A simple game designed for fun while implementing quadrature encoder
veeYceeY/riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
veeYceeY/riscv-smmtt
This specification will define the Smmtt privilege ISA extensions required to support the supervisor domain isolation for many isolation use cases e.g. confidential-computing, fault isolation and so on.
veeYceeY/speculation-bugs
Docs and resources on CPU Speculative Execution bugs
veeYceeY/systemc
Core SystemC Library