very3b

Pinned Repositories

2019icprojects
IC design project for under-gradutes sustech
Language:MATLAB0 1 01
A-to-Z-Resources-for-Students
Curated list of resources for college students
0 0 00
ac_pdk
A C
0 0 00
HFSS_script
Language:Visual Basic2 1 01
openem
Open source EM device (SMD, inductor, transformer etc.) HFSS python API
Language:Python2 1 01
Susee
tutorial
2 1 04

very3b's Repositories

very3b/Susee
tutorial
2 1 04
very3b/2019icprojects
IC design project for under-gradutes sustech
Language:MATLAB0 1 01
very3b/A-to-Z-Resources-for-Students
Curated list of resources for college students
0 0 00
very3b/ac_pdk
A C
0 0 00
very3b/Analog-Design-Modelling
Analog Hardware Hands on Design Labs and Modelling using SPICE Tools (NI Multisim, LTSpice)
0 0
very3b/basic_verilog
Must-have verilog systemverilog modules
Language:Verilog0 0
very3b/BioSPPy
Biosignal Processing in Python
Language:Python1 0
very3b/Comp_lock_adpll
Computationally locked PLL : verilog codes
Language:Verilog0 0
very3b/cv
Language:Python1 0
very3b/darknet
Convolutional Neural Networks
Language:C1 0
very3b/debug
Language:Verilog1 0
very3b/fapiao
Language:Python1 0
very3b/FPGA-Adaptive-Beamforming-and-Radar-Examples
This repository contains FPGA/HDL demonstrations several beamforming and radar designs. Simulink models and MATLAB reference code are provided to showcase high-level simulation and HDL designs of various radar and array processing algorithms.
Language:MATLAB0 0
very3b/jd_maotai_seckill
优化版本的京东茅台抢购神器
Language:Python0 0
very3b/js-ipfs-api
A client library for the IPFS HTTP API, implemented in JavaScript.
Language:JavaScript1 0
very3b/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow
Language:Verilog0 0
very3b/OpenROAD-flow
OpenROAD's top level repo pointing to stable binaries, code, sample designs and an example flow
Language:Makefile0 0
very3b/pages
Language:HTML1 0
very3b/pdkg
python generator for design kit
0 0
very3b/plutosdr-fw
PlutoSDR Firmware
Language:Shell0 0
very3b/Qcodes
Modular data acquisition framework
Language:Python0 0
very3b/rfsoc_qpsk
PYNQ example of using the RFSoC as a QPSK transceiver.
Language:VHDL0 0
very3b/rfsoc_sam
RFSoC Spectrum Analyser Module on PYNQ.
Language:VHDL0 0
very3b/transferlearning-tutorial
《迁移学习简明手册》
Language:TeX1 0
very3b/u40zcl
0 0
very3b/unlimited-landeng-for-win
无限流量灯，你懂的，我不解释
Language:C++1 0
very3b/verilog-ethernet
Verilog Ethernet components
Language:Verilog0 0
very3b/very3b.github.io
Language:HTML0 0
very3b/VHDL-JESD204b
JESD204b modules in VHDL
Language:VHDL0 0
very3b/you-get
:arrow_double_down: Dumb downloader that scrapes the web
Language:Python0 0