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inverter layout, DRC, LVS PDF
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NAND、NOR-virtuoso-simulation check here
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latch、flip-flopcheck here
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add library check here
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3-8decoder check here
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MOS characterization check here
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Current Mirror check here
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Differential Amplifier check here
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Two Stage Amplifier
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BGR Design Example
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LDO Design Example
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RF Basics (Smith Chart, 2-port Parameters)Smith Toolby Liuyao dai
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S-parameter T-type resistive attenuator by Liuyao dai S parameters_simulationby Liuyao dai
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Inductor and Transformer(EM Simulation)momentum by Wanli Zhan
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Cadence_Virtuoso_Momentum_Sim by Huiyang Li
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On-Chip transformer Design Transformer_Design_on-chip by Wanli Zhan
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LNA (SP simulation and PSS )
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RTL design
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Design compile
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Placement & Routing
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GF 130nm 8XP SiGe RF SIGE
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GF project setup DRC/LVS GF by Huiyang Li
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BiCMOS Process Overview link by Huiyang Li
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NPN transistor Simulation link by Huiyang Li
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NPN S-parameter simulaiton link by Huiyang Li
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BiCMOS ADE-xl Corner& Monte Carlo Simulation (to be updated by Huiyang)
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ADS dynamic link simulation by Huiyang Li