vinisha2410

LMS-Adaptive-filter

LMS-Adaptive Filter implement using verilog and Matlab

3bit_Binary_Counter_With_Astable_Multivibrator_As_Clock_Circuit

Convolutional-Neural-Network

Implementation of CNN using Verilog

FPGA_Handwritten_digit_recognition

password_based_lock_verilog

vinisha2410/3bit_Binary_Counter_With_Astable_Multivibrator_As_Clock_Circuit

vinisha2410/Convolutional-Neural-Network

Implementation of CNN using Verilog

vinisha2410/FPGA_Handwritten_digit_recognition

vinisha2410/password_based_lock_verilog