/Verilog-based-CPU

A 32-bit CPU which includes an ALU, a Register File, Control Unit, Data and Instruction memory

Primary LanguageVerilog

How to Use:

  1. Compile (make sure filles.txt is in the directory) iverilog -o my_design.vvp -c filles.txt

  2. Run vvp my_design.vvp

  3. Open with gtkwave tool gtkwave cpu_wavedata.vcd

Timing Diagrams

Instruction Read Miss

TD Instruction Read Miss

Instruction Read Hit

TD Instruction Read Hit

After Reset

TD After Reset

Zoom out view

TD zoom out view