/riscv-examples

This repository is designed to contain example programs written in a subset of the RISC-V ISA.

MIT LicenseMIT

RISC-V ISA Example Code

Overview

This repository is designed to contain example programs written in a subset of the RISC-V ISA. All of these examples are tested and confirmed to run as epected in the online RISC-V Interpreter: here (RISC-V Interpreter).

Supported Instructions

  • Arithmetics: ADD, ADDI, SUB
  • Logical: AND,ANDI, OR, ORI, XOR,XORI
  • Sets: SLT, SLTI, SLTU, SLTIU
  • Shifts: SRA, SRAI, SRL, SRLI SLL, SLLI
  • Memory: LW, SW, LB, SB
  • PC: LUI, AUIPC
  • Jumps: JAL, JALR
  • Branches: BEQ, BNE, BLT, BGE, BLTU, BGEU