wei851246721

wei851246721's Stars

• LeonZeng919/semantic-bookmark-search

  Language:TypeScript72

• fpgasystems/fpga-network-stack

  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

  Language:C++753270

• hpb-project/TOE

  TCP Offload Engine

  Language:Verilog7131

• KnowingNothing/compiler-and-arch

  A list of tutorials, paper, talks, and open-source projects for emerging compiler and architecture

  39634

• turkyden/lizhi

  🎸 李志 (B 仔) 音乐作品跨平台播放器，支持 Web / Mac / Windows / Linux

  Language:TypeScript89981

• ai-boost/awesome-prompts

  Curated list of chatgpt prompts from the top-rated GPTs in the GPTs Store. Prompt Engineering, prompt attack & prompt protect. Advanced Prompt Engineering papers.

  5.2k482

• hakiri/openTSN

  Language:C++3113

• lvzhengde/tsn-soc

  用于时间敏感网络TSN(Time-Sensitive Network)的SoC设计

  Language:Verilog132

• lvzhengde/xge-ptpv2

  用于10G以太网的PTPv2硬件引擎设计，Verilog HDL描述

  Language:C++142

• wxywb/history_rag

  Language:Python862113

• ZipCPU/dpll

  A collection of phase locked loop (PLL) related projects

  Language:Verilog9926

• bol-edu/caravel-soc

  Language:Verilog2518

• LispEngineer/EthernetRepeater

  A SystemVerilog implementation of a Ethernet Repeater targeting a Terasic DE2-115 and Marvell 88E1111 PHY

  Language:Verilog6

• 0xArt/RGMII_Ethernet_Transceiver_Verilog

  Verilog module to transmit/receive to/from RGMII compatible ethernet PHY

  Language:Verilog215

• milovanovic/gbemac

  A Gigabit Ethernet MAC

  Language:Verilog2

• JakeMercer/mac

  An Ethernet MAC conforming to IEEE 802.3

  Language:Verilog167

• freecores/ethmac

  Ethernet MAC 10/100 Mbps

  Language:Verilog7933

• freecores/round_robin_arbiter

  round robin arbiter

  Language:Verilog6722

• Forty-Bot/ethernet

  WIP 100BASE-TX PHY

  Language:Verilog715

• haoel/haoel.github.io

  Language:Shell12.7k2k

• jiangqizheng/BlueSea

  BlueSea，一个有趣的英语学习扩展，支持划词翻译、单词高亮、单词弹幕、记忆曲线复习、词频统计...

  Language:JavaScript1.1k110

• Starrynightzyq/Nexys4DDR-ARM-M3-Plate-Recognition

  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛

  Language:VHDL12821

• WangXuan95/BSV_Tutorial_cn

  一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。

  Language:Bluespec51042

• ultraembedded/riscv

  RISC-V CPU Core (RV32IM)

  Language:Verilog1.3k234

• loykylewong/FPGA-Application-Development-and-Simulation

  《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).

  Language:SystemVerilog12628