wzc314's Stars
InkboxSoftware/excelCPU
16-bit CPU for Excel, and related files
lowRISC/opentitan
OpenTitan: Open source silicon root of trust
hollance/neural-engine
Everything we actually know about the Apple Neural Engine (ANE)
Jack-Cherish/quantitative
量化交易:python3
ChampSim/ChampSim
ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.
BIGBALLON/PyTorch-CPP
PyTorch C++ inference with LibTorch
LvNA-system/labeled-RISC-V
sumanth-kalluri/cnn_hardware_acclerator_for_fpga
This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs
SlugLab/CXLMemSim
A place to store the CXL simulator
arm-university/arm-gem5-rsk
Official repository of the Arm Research Starter Kit on System Modeling using gem5
weifengliu-ssslab/Benchmark_SpMV_using_CSR5
CSR5-based SpMV on CPUs, GPUs and Xeon Phi
CMU-SAFARI/SparseP
SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) architectures. SparseP is developed to evaluate and characterize the first publicly-available real-world PIM architecture, the UPMEM PIM architecture. Described by C. Giannoula et al. [https://arxiv.org/abs/2201.05072]
CMU-SAFARI/Hermes
A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical path, as described by MICRO 2022 paper by Bera et al. (https://arxiv.org/pdf/2209.00188.pdf)
VeriGOOD-ML/public
lshpku/hwd-prefetch-study
A Study of the SiFive Inclusive L2 Cache
RainEggplant/vscode-verilog-integration
使用 VSCode 舒适地开发 Verilog
spcl/rapidchiplet
A toolchain for rapid design space exploration of chiplet architectures
ARM-software/HPCG_for_Arm
Sable/fait-maison-spmv
Sparse Matrix-Vector Multiplication implementations in C
zhuzhzh/verilog_emacsauto.vim
verilog filetype plugin to enable emacs verilog-mode autos
nulidangxueshen/CSR2
A New Format for SIMD-accelerated SpMV
quyifei23/gem5-for-CXL
this is a repository based on gem5 and aims to be modified for CXL
cslab-ntua/SpMV-Research
maltanar/spmv-vector-cache
A Vector Caching Scheme for Streaming FPGA SpMV Accelerators
KyleRoarty/gem5_docker
Run gem5 in Docker, avoiding issues with gem5 in newer OS and gcc versions
neuraghe/NEURAghe
NEURAghe project. CNN Accelerator
ozusrl/thundercat
eerbil/Code-Selection-For-SpMV-Using-Deep-Learning
Reimplementation of the paper "A Code Selection Mechanism Using Deep Learning" in Python.
wangyichao/KernelBench-ARM
Key Scientific Computing Kernels for HPC Workloads on ARM
ZhangMeng-program/SpMV