Pinned Repositories
accel-sim-framework
This is the top-level repository for the Accel-Sim framework.
Accelerating-RecSys-Training
Accelerating Recommender model training by leveraging popular choices -- VLDB 2022
accelergy
Accelergy is an energy estimation infrastructure for accelerator energy estimations
altis
A benchmarking suite for heterogeneous systems. The primary goal of this project is to improve and update aspects of existing benchmarking suites which are either insufficient or outdated.
ANN-Processor
Documentation and example programs for custom-developed instruction set architecture of the ANN Processor.
aws-fpga
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
axi-pcie-core
cactus
condensa
Programmable Neural Network Compression
corundum
Open source FPGA-based NIC and platform for in-network compute
yeonan's Repositories
yeonan/axi-pcie-core
yeonan/corundum
Open source FPGA-based NIC and platform for in-network compute
yeonan/cuda-gdb
CUDA GDB
yeonan/DeepSpeed
DeepSpeed is a deep learning optimization library that makes distributed training and inference easy, efficient, and effective.
yeonan/DissectingTensorCores
yeonan/dsa-framework
Release of stream-specialization software/hardware stack.
yeonan/ev-store-dlrm
yeonan/firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
yeonan/genie
A quick way into a systemd "bottle" for WSL
yeonan/hart-software-services
PolarFire SoC hart software services
yeonan/INFaaS
Model-less Inference Serving
yeonan/IoT-For-Beginners
12 Weeks, 24 Lessons, IoT for All!
yeonan/maestro
An analytical cost model evaluating DNN mappings (dataflows and tiling).
yeonan/ml_perf_model
ML performance model for GPU training of DLRM and more.
yeonan/onnx-mlir
Representation and Reference Lowering of ONNX Models in MLIR Compiler Infrastructure
yeonan/onnxruntime
ONNX Runtime: cross-platform, high performance ML inferencing and training accelerator
yeonan/open-gpu-kernel-modules
NVIDIA Linux open GPU kernel module source
yeonan/osdi-paper196-ae
Artifact for OSDI 22 Paper: Design and Verification of the Arm Confidential Compute Architecture
yeonan/pigasus
100Gbps Intrusion Detection and Prevention System
yeonan/qemu
Official QEMU mirror. Please see http://wiki.qemu.org/Contribute/SubmitAPatch for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
yeonan/ReGraph
Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
yeonan/SC_artifacts_eval
SC'22 Artifacts Evaluation
yeonan/sort-google-scholar
Sorting Google Scholar search results based on the number of citations
yeonan/tapa
TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerators.
yeonan/test-tlb
Stupid memory latency and TLB tester
yeonan/timeloop
Timeloop performs modeling, mapping and code-generation for Tensor Algebra workloads running on Explicitly-Decoupled Data Orchestration (EDDO) architectures.
yeonan/tvm
Open deep learning compiler stack for cpu, gpu and specialized accelerators
yeonan/UVVM
UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
yeonan/verilog-axi
Verilog AXI components for FPGA implementation
yeonan/vortex