yeonan's Stars
ATaylorCEngFIET/AMD-Vivado-Design-Suite-Essentials-Key-Techniques-for-Superior-RTL-Development
Zachary-Lee-Jaeho/initial-settings
vimrc and tmuxconf
tgrogers/ccws-2012
csl-iisc/SUV-MICRO24
csl-iisc/ScopeAdvice-MICRO24
A tool to find synchronization-related performance bugs in GPU programs.
ucb-bar/AuRORA
Virtualized Accelerator Orchestration for Multi-Tenant Workloads
prospar/false-sharing-micro24
OpenAMP/open-amp
The main OpenAMP library implementing RPMSG, Virtio, and Remoteproc for RTOS etc
leesou/PIM-DL-ASPLOS
PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization
google-research/circuit_training
VLSIDA/OpenRAM
An open-source static random access memory (SRAM) compiler.
tallendev/uvm-eval
This serves as a repository for reproducibility of the SC21 paper "In-Depth Analyses of Unified Virtual Memory System for GPU Accelerated Computing," as well as several components of the IPDPS21 paper "Demystifying GPU UVM Cost with Deep Runtime and Workload Analysis."
JRPan/crisp-artifact
cslab-ntua/elastic-translations-MICRO2024
MICRO2024 Artifact for Elastic Translations
ConvolutedDog/HyFiSS
HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
ingim/bibim
Minimalistic, markdown-based reference manager for computer science research
ChaseLab-PKU/BIZA
BIZA: Design of Self-Governing Block-Interface ZNS AFA for Endurance and Performance (SOSP 2024)
NVIDIA/cuda-samples
Samples for CUDA Developers which demonstrates features in CUDA Toolkit
CMU-SAFARI/Sectored-DRAM
A new DRAM substrate that mitigates the excessive energy consumption from both (i) transmitting unused data on the memory channel and (ii) activating a disproportionately large number of DRAM cells at low cost. Described in our paper https://arxiv.org/pdf/2207.13795.
oscarlab/mosaic-asplos23-artifacts
CMU-SAFARI/Load-Inspector
A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arxiv.org/pdf/2406.18786
llvm/Polygeist
C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!
rishucoding/reproduce_MICRO24_GPU_DLRM_inference
Sharing the codebase and steps for artifact evaluation/reproduction for MICRO 2024 paper
gthparch/macsim
A heterogeneous architecture timing model simulator.
SamsungLabs/Sparse-Multi-DNN-Scheduling
Open-source artifacts and codes of our MICRO'23 paper titled “Sparse-DySta: Sparsity-Aware Dynamic and Static Scheduling for Sparse Multi-DNN Workloads”.
AIS-SNU/Optimus-CC
[ASPLOS'23] Optimus-CC: Efficient Large NLP Model Training with 3D Parallelism Aware Communication Compression
scale-snu/AE_DRAMScope_ISCA2024
THU-DSP-LAB/ventus-gpgpu
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
THU-DSP-LAB/ventus-gpgpu-verilog
GPGPU supporting RISCV-V, developed with verilog HDL
llvm/torch-mlir
The Torch-MLIR project aims to provide first class support from the PyTorch ecosystem to the MLIR ecosystem.