yuz835

yuz835's Stars

• bitcoin/bitcoin

  Bitcoin Core integration/staging tree

  Language:C++78k4k8.1k36k

• ethereum/go-ethereum

  Go implementation of the Ethereum protocol

  Language:Go47.1k2.2k8.1k19.9k

• python-telegram-bot/python-telegram-bot

  We have made you a wrapper you can't refuse

  Language:Python25.8k5972.2k5.2k

• Jack-Cherish/python-spider

  :rainbow:Python3网络爬虫实战：淘宝、京东、网易云、B站、12306、抖音、笔趣阁、漫画小说下载、音乐电影下载等

  Language:Python18k635815.9k

• wangshub/wechat_jump_game

  微信《跳一跳》Python 辅助

  Language:Python13.8k5629884.3k

• secdev/scapy

  Scapy: the Python-based interactive packet manipulation program & library.

  Language:Python10.5k2341.6k2k

• iamxjb/winxin-app-watch-life.net

  微慕小程序开源版-WordPress版微信小程序

  Language:JavaScript2.8k13055755

• cryptonomex/graphene

  Language:C++1.1k159641337

• synthetos/TinyG

  Affordable Industrial Grade Motion Control

  Language:G-code890165259293

• phaethon/kamene

  Network packet and pcap file crafting/sniffing/manipulation/visualization security tool. Originally forked from scapy in 2015 and providing python3 compatibility since then.

  Language:Python86348149192

• westerndigitalcorporation/swerv_eh1

  A directory of Western Digital’s RISC-V SweRV Cores

  Language:SystemVerilog853950130

• swisskyrepo/Wordpresscan

  WPScan rewritten in Python + some WPSeku ideas

  Language:Python6353029205

• cnrv/riscv-soc-book

  关于RISC-V你所需要知道的一切

  53129966

• UVVM/UVVM

  UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/

  Language:VHDL3565418990

• cloudinary/pycloudinary

  Python package for cloudinary

  Language:Python25131116132

• OasisDEX/oasis

  Oasis - Decentralized Token Market

  Language:JavaScript1705531256

• tinajs/tina-hackernews

  :tv: A Tina.js powered Wechat-Mini-Program implementation of Hacker News Reader

  Language:HTML915214

• synapticon/siitool

  Siitool generates your SII/EEPROM files from the ESI/XML description files of your EtherCAT devices. The program is also capable of interpreting a raw SII/EEPROM file and print it in a human-friendly syntax.

  Language:C57231140

• mjlyons/vSPI

  Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter

  Language:Verilog407113

• quartiq/redpid

  migen + misoc + redpitaya = digital servo

  Language:Verilog34606

• gogogoutham/bitcointalk-scraper

  Python-based scraper / crawler for members and messages on bitcointalk.org

  Language:Python32417

• DiamondLightSource/ethercat

  EPICS support to read/write to ethercat based hardware

  Language:C2414512

• ihmcrobotics/ihmc-ethercat-master

  Java EtherCAT master based on the SOEM EtherCAT master

  Language:Java218814

• iobond/aib

  Advanced Internet Blockchain Technology - Values by multiple blockchain projects

  Language:C++199318

• Juniper/simple_reg_model

  System verilog register model for uvm testbenches.

  Language:Perl1815

• viciousstar/BitcointalkSpider

  Using scrapy to crawl some dates from www.bitcointalk.org and store data in Mongodb，also can plot it by pylab.

  Language:Python16429

• xcore/sc_ethercat

  A feasibility study on building an EtherCAT slave controller

  Language:Objective-C13605

• keqiao2017/AXI_Lite

  This is an Ip design for AXI_Lite including master and slave in Vivado 2016.4

  Language:Verilog4111

• proubatsis/Add-Header

  A python script that adds a header to all files with the given extensions.

  Language:Python1200

• speakinghedge/scapy

  Scapy: the python-based interactive packet manipulation program & library

  Language:Python10