Zero ASIC

Boston,MA

Pinned Repositories

ebrick-demo
Demo: how to create a custom EBRICK
Language:SystemVerilog16 4 00
logik
A configurable RTL to bitstream FPGA toolchain
Language:Python257 7 27
sbtest
Docker image with RTL simulation tools preinstalled
Language:Dockerfile0 5 00
switchboard
Communication framework for RTL simulation and emulation.
Language:Python264 7 5821
umi
Universal Memory Interface (UMI)
Language:Verilog142 10 2712
zaui
Generate a website from markdown with a minimum of fuss.
Language:Svelte9 6 50

Zero ASIC's Repositories

zeroasiccorp/switchboard
Communication framework for RTL simulation and emulation.
Language:Python264 7 5821
zeroasiccorp/logik
A configurable RTL to bitstream FPGA toolchain
Language:Python257 7 27
zeroasiccorp/umi
Universal Memory Interface (UMI)
Language:Verilog142 10 2712
zeroasiccorp/ebrick-demo
Demo: how to create a custom EBRICK
Language:SystemVerilog16 4 00
zeroasiccorp/zaui
Generate a website from markdown with a minimum of fuss.
Language:Svelte9 6 50
zeroasiccorp/sbtest
Docker image with RTL simulation tools preinstalled
Language:Dockerfile0 5 00