My solutions for the projects of ECE 510 - Foundations in Computer Engineering in UMass Amherst.
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- AKA Finite State Machines in Verilog. This assignment will give you experience in Verilog by implementing a Finite State Machine using of a simplified elevator operation. It will also expose you to buffering and serialization when multiple elevator buttons are pressed simultaneously.
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- The goal of this project is to practice elementary concepts in C++ programming.
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- This assignment will give you experience in programming in C++ and the operation of a MIPS pipelined processor. Further, you will gain insight into how multiple events that occur in parallel can be simulated using a sequential machine.