zhangyl4991

zhangyl4991's Stars

• eirikpre/VSCode-SystemVerilog

  SystemVerilog support in VS Code

  Language:TypeScript12649

• vim-scripts/txt.vim

  Universal syntax script for all txt docs, logs and other types

  Language:VimL93

• flniu/txt.vim

  Make Vim more usable for viewing and editing plain text

  Language:Vim script61

• recogni/svlib

  svlib from http://www.verilab.com/resources/svlib/

  Language:SystemVerilog197

• dalance/svls

  SystemVerilog language server

  Language:Rust44532

• 0qinghao/istyle-verilog-formatter

  Open source implementation of a Verilog formatter

  Language:C++213

• chipsalliance/verible

  Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

  Language:C++1.3k201

• dalance/sv-parser

  SystemVerilog parser library fully compliant with IEEE 1800-2017

  Language:Rust39552

• alainmarcel/Surelog

  SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

  Language:C++253

• holoto/color-scheme

  color-scheme,颜色方案,color主题,scheme,webstrom,phpstrom,pytharm,配色方案,编辑器,xfce4主题,护眼,暗色,dark

  16445

• JunningWu/Learning-NVDLA-Notes

  NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:junning.wu@ia.ac.cn

  21966