zhelnio

RTL Design Engineer

Russia, Moscow

Pinned Repositories

mipsfpga-plus
MIPSfpga+ allows loading programs via UART and has a switchable clock
Language:Verilog103 45 1136
schoolMIPS
CPU microarchitecture, step by step
Language:Verilog192 41 163
ahb_lite_sdram
SDRAM controller for MIPSfpga+ system
Language:Verilog20 3 67
ahb_lite_uart16550
UART 16550 core for MIPSfpga+ system
Language:Verilog5 2 05
ddec
Digital Design Express Course
Language:Verilog17 5 07
mil1553-spi
MIL-STD-1553 <-> SPI bridge
Language:SystemVerilog26 7 05
MPSSELight
Lightweight .net MPSSE library for FT2232D, FT232H, FT2232H and FT4232H devices
Language:C#29 5 38
schoolRISCV
CPU microarchitecture, step by step
Language:Makefile164 15 058
ubuntu-hdl-tools-install
Scripts to simplify the HDL dev tools installation on Ubuntu 18.04 (x64)
Language:Shell5 2 15
uvm_ahb_lite
uvm ahb lite environment
Language:SystemVerilog6 2 03

zhelnio's Repositories

zhelnio/schoolRISCV
CPU microarchitecture, step by step
Language:Makefile164 15 058
zhelnio/MPSSELight
Lightweight .net MPSSE library for FT2232D, FT232H, FT2232H and FT4232H devices
Language:C#29 5 38
zhelnio/mil1553-spi
MIL-STD-1553 <-> SPI bridge
Language:SystemVerilog26 7 05
zhelnio/ahb_lite_sdram
SDRAM controller for MIPSfpga+ system
Language:Verilog20 3 67
zhelnio/ddec
Digital Design Express Course
Language:Verilog17 5 07
zhelnio/uvm_ahb_lite
uvm ahb lite environment
Language:SystemVerilog6 2 03
zhelnio/ahb_lite_uart16550
UART 16550 core for MIPSfpga+ system
Language:Verilog5 2 05
zhelnio/memos
some public files to use it in blog, forum posts, etc
5 3 12
zhelnio/ubuntu-hdl-tools-install
Scripts to simplify the HDL dev tools installation on Ubuntu 18.04 (x64)
Language:Shell5 2 15
zhelnio/ddstart
Digital Design Introduction Labs
Language:Verilog3 2 01
zhelnio/schoolMIPS
This is my sandbox for some experiments. Please use MIPSfpga/schoolMIPS
Language:Verilog3 2 0
zhelnio/AvrDDS
ATmega88 based DDS signal generator from 2013
Language:Eagle2 2 0
zhelnio/buildroot
Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.
Language:Makefile2 2 0
zhelnio/drawio-layer
Layer management script for draw.io
Language:Makefile2 2 0
zhelnio/linux
MIPSfpga linux experiments
Language:C2 2 0
zhelnio/mipsfpga-plus
MIPSfpga+ allows loading programs via UART and has a switchable clock
Language:Verilog2 3 0
zhelnio/schoolRISCV.doc
doc generation for schoolRISCV
Language:Makefile2 2 01
zhelnio/10base_t_sandbox
just a sandbox
1 2 0
zhelnio/alpha
64-bit Alpha Architecture implementation
Language:SystemVerilog1 2 01
zhelnio/digital-design-lab-manual
Digital Design Labs
Language:Verilog1 2 03
zhelnio/fpga-sdk-prj
FPGA-based SDK projects for SCRx cores
Language:Verilog1 2 0
zhelnio/hdlparse
Simple parser for extracting VHDL documentation
Language:Python1 1 0
zhelnio/scr1-sdk
open-source SDK for SCR1 core
Language:C1 2 0
zhelnio/symbolator
HDL symbol generator
Language:Python1 1 0
zhelnio/vpm
verilog pipeline macro
Language:SystemVerilog1 2 1
zhelnio/linkern
linux kernel experiments
Language:C2 0
zhelnio/python-telegram-bot
We have made you a wrapper you can't refuse
Language:Python1 0
zhelnio/RALBot-html
Generate address space documentation HTML from compiled SystemRDL input
Language:JavaScript1 0
zhelnio/test
just a test
Language:HTML2 0
zhelnio/tptest
Just a small test program
Language:C2 0