/test

just a test

Primary LanguageHTMLMIT LicenseMIT

schoolRISCV

Tiny RISCV CPU. Originally based on Sarah L. Harris MIPS CPU ("Digital Design and Computer Arhitecture" by David Money Harris and Sarah L Harris) and schoolMIPS project. Supports only a subset of RISCV commands.

Resources

  • Microarchitecture of schoolRISCV (Russian) [pdf]
  • RISC-V ISA Specification [pdf, source]
  • RARS Simulator [GitHub]

Microarchitecture of schoolRISCV (Russian)

<iframe src="https://zhelnio.github.io/test/slides.html" style="width: 1000px; height: 560px; border: 0px"></iframe>

RISC-V ISA