Pinned Repositories
2x2_Mesh_NoC
A 2x2 2-D Mesh NoC with Vitis HLS
4096bit-IDDMM-Verilog
4096bit Iterative digit-digit Montgomery Multiplication in Verilog
Cache
L1 Data, L1 Instruction and L2 Unified Cache Design FOR RV64IMC
ChampSim
ChampSim repository
chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
corundum
Open source FPGA-based NIC and platform for in-network compute
ECC
ECC Verilog(192-bit P-field)
FFT_Convolution
64x64 convolution, the FFT Model is modified by https://www.itread01.com/content/1546333932.html
fpga-network-stack
Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
Spectre-RISCV
Spectre attacks(Spectre-{PHT, BTB RSB} and Spectre v4) on RISC-V ISA.
zznjupt's Repositories
zznjupt/Spectre-RISCV
Spectre attacks(Spectre-{PHT, BTB RSB} and Spectre v4) on RISC-V ISA.
zznjupt/ECC
ECC Verilog(192-bit P-field)
zznjupt/2x2_Mesh_NoC
A 2x2 2-D Mesh NoC with Vitis HLS
zznjupt/4096bit-IDDMM-Verilog
4096bit Iterative digit-digit Montgomery Multiplication in Verilog
zznjupt/Cache
L1 Data, L1 Instruction and L2 Unified Cache Design FOR RV64IMC
zznjupt/ChampSim
ChampSim repository
zznjupt/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
zznjupt/corundum
Open source FPGA-based NIC and platform for in-network compute
zznjupt/FFT_Convolution
64x64 convolution, the FFT Model is modified by https://www.itread01.com/content/1546333932.html
zznjupt/fpga-network-stack
Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
zznjupt/gem5
The official repository for the gem5 computer-system architecture simulator.
zznjupt/gen_amba_2021
AMBA bus generator including AXI4, AXI3, AHB, and APB
zznjupt/GRU_AI_Accelerator
The sigmiod and tanh functions in GRU are inspired by "A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions, IEEE International Symposium on Circuits and Systems (ISCAS 2021)", NJU
zznjupt/hw
RTL, Cmodel, and testbench for NVDLA
zznjupt/labs-with-cva6
Advanced Architecture Labs with CVA6
zznjupt/Limago
Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
zznjupt/Modular-Inverse-in-Verilog
Montgomery Inverse with Binary Extended Euclidean Algorithm, Easily expandable
zznjupt/NVDLA-Project
Implementation of Nvidia Deep Learning Accelerator (NVDLA) full-system on ZynqMPSoC
zznjupt/openc910
OpenXuantie - OpenC910 Core
zznjupt/paper-reading-list
My paper reading list and notes for various research topics
zznjupt/pulpino
An open-source microcontroller system based on RISC-V
zznjupt/riscv_cpu
ysyx project 5th
zznjupt/RVBOOK
knowledge-share
zznjupt/soDLA
soDLA ownership has been transfered to soDLA-publishment. This repo is to torture soDLA.
zznjupt/Spectre-Attack
Spectre attacks and defenses
zznjupt/SRBPU
zznjupt/verilog-ethernet
Verilog Ethernet components for FPGA implementation
zznjupt/XilinxBoardStore
zznjupt/ZhiShan
zznjupt/zznjupt