Fault switches not working
Prince-Joy opened this issue · 11 comments
@donn
I am facing issues with fault, after completion of the installation procedure, when I am trying to get version using fault --version/-V
It's showing me the help menu every time, not only that, only subcommand are working like
- fault synth --top xyz -l xyz.lib xyz.v > its working
- fault cut xyz.netlist.v > its also working but when I am trying to run fault --cellModel xyz.v filename its not working instead showing help menu every time.
If you check the resulting help menu, you will notice that one other option is required, namely --clock.
Please add the missing option and retry.
Thank you so much @donn , I am facing another issue can you please look into it.
Though I am using different liberty now, but facing another issue, need some help
For the first issue, try updating IcarusVerilog, I recall having this issue myself with older versions.
Tap is @Manarabdelaty territory. Manar?
@Prince-Joy Can you make sure of the following ?
- if the reset signal is asynchronous, you will need to add it to the ignored inputs during simulation; using
--ignoring.This is because generating a test pattern for an asynchronous reset could arbitrarily reset the circuit if it is set to either 0 or 1. (You will need to specify the --ignoring for the main option and and both the chain and tap sub-commands)
If this is not the case with your design, can you post the chained.v file and .bin files ?
@donn I am using the latest iverilog from github https://github.com/steveicarus/iverilog, can you send me any link of iverilog which is working fine.
@Manarabdelaty In my code reset is synchronous,
reference: asic-world
After running the following commands
I got the error:
chained.v and json file
up_counter.netlist.v.chained.v.txt
up_counter.netlist.v.cut.v.tv.json.compacted.json.txt
@Prince-Joy I'm facing similar issues. When I try to run anything using osu035, I get the same at Test Vector generation. This is bypassed when nangate is used. However, at fault asm I encounter the mismatch of json and scan chain registers. I tried ignoring clock and reset with the help of fault -i command but the same error. Also, there seems to be a mismatch of just 1 input and scan register each time.
@Prince-Joy I found the reason for mismatch. Please ensure that you ignore your reset signal for TV generation step by appending -i reset option to fault command (your clock automatically gets ignored when --clock command is used. While running fault chain command, you are ignoring reset and clock using --reset and --clock respectively. If you had not ignored this at TV generation step then you basically got one extra test vector input as compared to the total scan chain register.
@donn please verify whether this explanation is correct or not.
That's actually correct, yeah. You're supposed to add the reset to -i.
Maybe for consistency, I should add the --reset option to the fault command.
But wouldn't that cause issue for the designs that don't necessarily use reset?
For example, in the folder /Benchmarks/ISCAS_89, some of the designs don't use reset. I tried running s298.v.
The module does not contain reset(or none of the inputs resemble a reset signal).
I tried creating TV for the same but ran into an error. And without much idea I cant consider any of the input as reset.
Please clarify if I misunderstood.
Good point, though the thing is I don't think it would be easy to make scan chains that cannot be reset. I'll have to discuss with the team whether we want to support no-reset designs.