ErickOF

ErickOF's Stars

• TheAlgorithms/Python

  All Algorithms implemented in Python

  Language:Python197k5.9k1.6k46.2k

• feder-cr/Jobs_Applier_AI_Agent

  Jobs_Applier_AI_Agent aims to easy job hunt process by automating the job application process. Utilizing artificial intelligence, it enables users to apply for multiple jobs in a tailored way.

  Language:Python26.7k1736613.9k

• ycm-core/YouCompleteMe

  A code-completion engine for Vim

  Language:Python25.5k5553.3k2.8k

• black-forest-labs/flux

  Official inference repo for FLUX.1 models

  Language:Python19.7k1711891.4k

• cyrus-and/gdb-dashboard

  Modular visual interface for GDB in Python

  Language:Python11.4k224254793

• yetone/avante.nvim

  Use your Neovim like using Cursor AI IDE!

  Language:Lua9.1k51429347

• Ryubing/Ryujinx

  Nintendo Switch emulator written in C#, originally created by gdkchan.

  Language:C#7.2k77303563

• bblanchon/ArduinoJson

  📟 JSON library for Arduino and embedded C++. Simple and efficient.

  Language:C++6.8k2002k1.1k

• meltylabs/melty

  Chat first code editor. To download the packaged app:

  Language:TypeScript5.3k5637365

• facebookresearch/sapiens

  High-resolution models for human tasks.

  Language:Python4.8k47182277

• pytorch/torchchat

  Run PyTorch LLMs locally on servers, desktop and mobile

  Language:Python3.5k35354231

• google/skywater-pdk

  Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

  Language:Python3k158274400

• helblazer811/ManimML

  ManimML is a project focused on providing animations and visualizations of common machine learning concepts with the Manim Community Library.

  Language:Python2.5k3338148

• eli64s/readme-ai

  README file generator, powered by AI.

  Language:Python1.7k1760186

• The-OpenROAD-Project/OpenROAD

  OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

  Language:Verilog1.7k531.5k591

• feizc/FluxMusic

  Text-to-Music Generation with Rectified Flow Transformers

  Language:Python1.7k1924128

• ultraembedded/cores

  Various HDL (Verilog) IP Cores

  Language:Verilog725495215

• malhotra5/Manim-Tutorial

  A tutorial for manim, a mathematical animation engine made by 3b1b

  Language:Python702211588

• ZipCPU/wb2axip

  Bus bridges and other odds and ends

  Language:Verilog5113159101

• chipsalliance/VeeRwolf

  FuseSoC-based SoC for VeeR EH1 and EL2

  Language:Verilog303275968

• wuxx/Colorlight-FPGA-Projects

  current focus on Colorlight i5 and i9 & i9plus module

  Language:Verilog277171661

• SystemRDL/systemrdl-compiler

  SystemRDL 2.0 language compiler front-end

  Language:C++2422617269

• fpgadeveloper/fpga-drive-aximm-pcie

  Example designs for FPGA Drive FMC

  Language:Tcl2313222101

• pulp-platform/cheshire

  A minimal Linux-capable 64-bit RISC-V SoC built around CVA6

  Language:Verilog220152352

• themperek/cocotb-test

  Unit testing for cocotb

  Language:Python1531011972

• SystemRDL/PeakRDL

  Control and status register code generator toolchain

  Language:Python111124125

• pulp-platform/register_interface

  Generic Register Interface (contains various adapters)

  Language:SystemVerilog1036425

• pulp-platform/pulp_soc

  pulp_soc is the core building component of PULP based SoCs

  Language:Python79102181

• chili-chips-ba/openCologne

  Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples => https://www.chili-chips.xyz/open-cologne | Also see https://nanoxplore.com

  Language:Verilog4817505

• pulp-platform/tech_cells_generic

  Technology dependent cells instantiated in the design for generic process (simulation, FPGA)

  Language:SystemVerilog428330