Pinned Repositories
-Dynamic-shift-Registers
This is a documentation of the steps involved in designing a 1-bit Dynamic Shift Register on the SYNOPSYS Custom Compiler - 32nm PDK
Barrel-Shifter-8-bit
RTL to GDS flow of a 8bit Barrel Shifter
e-CAD-LAB-
eSim-Cloud
A web-based system for designing and simulating electronic (eSim) and Arduino circuits.
FIFO-design
Designed 32-bit data Width Sync FIFO and Synchronizer.
Major-Project-PLL
Design of a Mixed Signal Fractional-N PLL
Mixed-signal-Two-Step-Flash-ADC
This circuit is a part of Mixed Signal SOC design.
msvsd2stepadc
VSD Mixed-signal PD Research Program
msvsdspwm
VSD-Mixed-Signal-PD-Research
Report_assignment
Jayanth-sharma's Repositories
Jayanth-sharma/Mixed-signal-Two-Step-Flash-ADC
This circuit is a part of Mixed Signal SOC design.
Jayanth-sharma/eSim-Cloud
A web-based system for designing and simulating electronic (eSim) and Arduino circuits.
Jayanth-sharma/-Dynamic-shift-Registers
This is a documentation of the steps involved in designing a 1-bit Dynamic Shift Register on the SYNOPSYS Custom Compiler - 32nm PDK
Jayanth-sharma/Barrel-Shifter-8-bit
RTL to GDS flow of a 8bit Barrel Shifter
Jayanth-sharma/e-CAD-LAB-
Jayanth-sharma/FIFO-design
Designed 32-bit data Width Sync FIFO and Synchronizer.
Jayanth-sharma/Major-Project-PLL
Design of a Mixed Signal Fractional-N PLL
Jayanth-sharma/msvsd2stepadc
VSD Mixed-signal PD Research Program
Jayanth-sharma/msvsdspwm
VSD-Mixed-Signal-PD-Research
Jayanth-sharma/Report_assignment
Jayanth-sharma/RTL-design-synthesis-using-sky130--vsd
Jayanth-sharma/sky130AdvancedPhysicalDesignWorkshop
Jayanth-sharma/traffic-light-controller
A project to design FSMs based Traffic light controller with Variable Timers
Jayanth-sharma/Two-Stage-OpAmp-Circuit-
Jayanth-sharma/Vital-Sign-Monitor-using-HB100-Radar