JoyBed

JoyBed's Stars

• Reiten966/Polyformer

  Polyformer is an open-source project that aims to recycle plastics into FDM filaments

  Language:G-code1k7513122

• eugene-tarassov/vivado-risc-v

  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

  Language:Tcl85935212196

• shorepine/tulipcc

  The Tulip Creative Computer - a portable Python synthesizer for music and graphics

  Language:C4531517629

• fabriziotappero/ip-cores

  A huge collection of VHDL/Verilog open-source IP cores scraped from the web

  383290118

• Xinyuan-LilyGO/T-Deck

  Language:C310266454

• RHSResearchLLC/NiteFury-and-LiteFury

  Public repository for Litefury & Nitefury

  Language:SystemVerilog273275672

• google/android-riscv64

  Issues and discussions around RISC-V support in AOSP.

  2263914815

• regymm/quasiSoC

  Linux capable RISC-V SoC designed to be readable and useful.

  Language:C130728

• BillDH2k/Hackintosh-HP-Z420-Z620-Z820-OpenCore

  OpenCore Loader for HP Z420/620/820.

  Language:C5532613

• ChinaQMTECH/QM_XC7A100T_WUKONG_BOARD

  314213

• martinriis/RISC-V-Vector-Processor

  256-bit vector processor based on the RISC-V vector (V) extension

  Language:SystemVerilog28503

• nckubugman/NetFPGA-SUME-High-Frequency-Trading-Machine

  Use NetFPGA SUME to implement HFT Machine based on TWSE Stock Server

  Language:Verilog26206

• mjkkirschner/simpleGPUCore

  verilog/FPGA hardware description for very simple GPU

  Language:Verilog17300

• black1225/blackminer

  Language:C125020

• iliasam/10base_t_software_PHY

  Language:C11408

• SpinalHDL/NaxSoftware

  Language:C81015

• linsinan1995/riscv-gcc

  Implementation of RISC-V P/ZCE extension for GCC backend

  74131

• c3sr/Quantum-Computing

  Language:VHDL6800

• adspirop/SHA-1-VHDL

  Implementation of SHA-1 core in VHDL for FPGA Using Pipeline

  Language:VHDL4101

• openXC7/prjxray-db

  Project X-Ray Database: XC7 Series

  Language:Makefile4403

• xalogic-open/xaccel

  Language:Python4200

• atomminer/Nist5-hls

  Nist5 Coin Algo for AtomMiner FPGA Miner

  Language:Verilog3203

• fpetrot/riscv-gcc

  Fork of riscv-gcc supporting the 128-bit riscv extension

  3200

• Jadavis123/qc-emulator

  Verilog/SystemVerilog and Python code related to an FPGA-based quantum computer emulator

  Language:SystemVerilog320

• ionicsolutions/fecs

  FPGA-based high-resolution pulse sequencer for an ionic quantum network

  Language:Verilog2102

• linsinan1995/riscv-binutils-gdb

  [p/zce extension support] RISC-V backports for binutils-gdb. Development is done upstream at the FSF.

  Language:C2262

• VladikNeVladik/Quantum-Random-Number-Generator

  LED + single photon photoamplifier detection + analog signal amplifier + FPGA + UART-transmitter to PC = 250kbps Quantum Random Number Generator

  Language:Verilog2110

• kmcbrian/FPGA-Variational-Quantum-Circuit

  Simulate Variational Quantum Circuits on an FPGA.

  Language:C++1101

• kr1z1s/odocrypt_py

  Odocrypt hash module for python projects

  Language:C++1002

• Lonero-Team/Installing-UNOMP

  Simple installation guide for UNOMP

  1302