L1M4SFULL

L1M4SFULL's Stars

• OpenXiangShan/XiangShan

  Open-source high-performance RISC-V processor

  Language:Scala4.8k87400654

• chipsalliance/chisel

  Chisel: A Modern Hardware Design Language

  Language:Scala4k1501.1k594

• AndronixApp/AndronixOrigin

  This is the official repository for the back end of the Andronix app 🚀. Here you can know all the scripts you're installing 😎

  Language:Shell1.7k109244336

• amaranth-lang/amaranth

  A modern hardware definition language and toolchain based on Python

  Language:Python1.6k45813174

• XUANTIE-RV/openc910

  OpenXuantie - OpenC910 Core

  Language:Verilog1.2k4627307

• freechipsproject/chisel-bootcamp

  Generator Bootcamp Material: Learn Chisel the Right Way

  Language:Jupyter Notebook9746877276

• syntacore/scr1

  SCR1 is a high-quality open-source RISC-V MCU core in Verilog

  Language:SystemVerilog8575156275

• topocm/topocm_content

  Course on topology in condensed matter

  Language:Python28130184146

• openhwgroup/core-v-cores

  CORE-V Family of RISC-V Cores

  20628115

• QuEraComputing/Bloqade.jl

  Package for the quantum computation and quantum simulation based on the neutral-atom architecture.

  Language:Julia183822036

• zhelnio/schoolRISCV

  CPU microarchitecture, step by step

  Language:Makefile16415058

• NVlabs/AutoDMP

  Language:C++128101122

• langx/langx

  We connect language learners worldwide. Practice and immerse yourself in different languages.

  Language:TypeScript85452829

• LemurPwned/cmtj

  A Python library for simulating multilayer magnetic structures.

  Language:Python344325

• htmicron/htlrbl32l

  HTLRBL32L Lora+BLE Repository

  17909

• gaph-pucrs/RS5

  RV32I[M][C][V][_Zihpm][_Zkne][_Xosvm]_Zicsr processor

  Language:C9531

• gaph-pucrs/pucrs-rv

  Language:C5302