MIPT-ILab/mipt-mips

Implement decoder for compressed RISC-V instructions

pavelkryukov opened this issue · 5 comments

pavelkryukov commented

RISC-V ISA specifies 'C' (compressed) subset of 16-bit encoded instructions: https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf, chapter 12.

Your goal is extended RISCV_Instr_Decoder class to support the compressed instructions, and add these instructions to our RISCV ISA table:

  1. C.LWSP
  2. C.LDSP
  3. C.LQSP
  4. C.SWSP
  5. C.SDSP
  6. C.SQSP
  7. C.LW
  8. C.LD
  9. C.LQ
  10. C.J
  11. C.JAL
  12. C.JR
  13. C.JALR
  14. C.BEQZ
  15. C.BNEZ
  16. C.LI
  17. C.LUI
  18. C.ADDI
  19. C.ADDIW
  20. C.ADDI16SP
  21. C.ADDI4SPN
  22. C.SLLI
  23. C.SRLI
  24. C.SRAI
  25. C.ANDI
  26. C.MV
  27. C.ADD
  28. C.AND
  29. C.OR
  30. C.XOR
  31. C.SUB
  32. C.ADDW
  33. C.SUBW
  34. C.EBREAK
beanefit commented

I tried to add some code. Could you please tell me if I am in the right way or not?

pavelkryukov commented

I propose to start with unit tests first.
We have some tests for RISC-V decoder here:

mipt-mips/simulator/risc_v/t/unit_test.cpp

Lines 11 to 22 in 3357feb

TEST_CASE("RISCV disassembly")
{
CHECK( RISCVInstr<uint32>(0x597).get_disasm() == "auipc $a1, 0x0" );
CHECK( RISCVInstr<uint32>(0x00f70463).get_disasm() == "beq $a4, $a5, 8");
CHECK( RISCVInstr<uint32>(0x00052783).get_disasm() == "lw $a5, 0x0($a0)");
CHECK( RISCVInstr<uint32>(0xf95ff06f).get_disasm() == "jal $zero, -108");
CHECK( RISCVInstr<uint32>(0x30529073).get_disasm() == "csrrw $mtvec, $zero, $t0");
CHECK( RISCVInstr<uint32>(0x10200073).get_disasm() == "sret");
CHECK( RISCVInstr<uint32>(0x30200073).get_disasm() == "mret");
CHECK( RISCVInstr<uint32>(0x30202373).get_disasm() == "csrrs $medeleg, $t1, $zero");
CHECK( RISCVInstr<uint32>(0x30205073).get_disasm() == "csrrwi $medeleg, $zero, 0x0");
}

You can write new tests by your own, following the ISA paper, or you can use these from LLVM: https://github.com/llvm/llvm-project/blob/master/llvm/test/MC/RISCV/rv32c-valid.s

beanefit commented

I have implemented C_LWSP, C_SW, C_LW instructions on my 'Compressed-ISA' github branch. Could you please have a look at it?

pavelkryukov commented
pavelkryukov commented

Please open a pull request to initialize code review tool