MIPT-ILab/mipt-mips

Issues

• Finish 'How to debug MIPT-MIPS using GDB' manual

  #525 opened 6 years ago by pavelkryukov
  31

• Add option to enable unified pipeline

  #463 opened 6 years ago by pavelkryukov
  1

• Add unit tests for Branch module

  #512 opened 4 years ago by pavelkryukov
  8

• Implement memory translation

  #625 opened 5 years ago by pavelkryukov
  1

• Implement topology graph visualizer tool

  #520 opened 5 years ago by pavelkryukov
  15

• Make PortMap not a singletone class

  #519 opened 5 years ago by pavelkryukov
  0

• Add unit tests for bypass module

  #716 opened 6 years ago by pavelkryukov
  9

• Redirect control flow to exception handlers in performance simulation mode

  #587 opened 6 years ago by pavelkryukov
  0

• Implement `eret` instruction

  #588 opened 6 years ago by pavelkryukov
  1

• Implement "likely" branches

  #614 opened 6 years ago by pavelkryukov
  2

• Implement delayed branches in PerfSim

  #639 opened 6 years ago by pavelkryukov
  0

• Add option to set writeback bandwidth

  #461 opened 6 years ago by pavelkryukov
  17

• Enhance Trap class

  #602 opened 6 years ago by pavelkryukov
  8

• Add statistics for branch mispedict rate

  #649 opened 6 years ago by pavelkryukov
  0

• Decouple BTB and BP

  #613 opened 6 years ago by pavelkryukov
  11

• Add wiki page about factory patterns

  #493 opened 6 years ago by pavelkryukov
  2

• Convert torture tests to unit tests

  #530 opened 6 years ago by pavelkryukov
  49

• Add unit tests to Simulator factory

  #720 opened 6 years ago by pavelkryukov
  0

• Support big-endian guests and big-endian hosts

  #387 opened 6 years ago by pavelkryukov
  0

• Implement delayed branches in Functional simulation

  #626 opened 6 years ago by pavelkryukov
  33

• Inherit MIPSInstr and RISCVInstr from a common data structure

  #723 opened 6 years ago by pavelkryukov
  3

• Implement RISCVInstrDecoder class for RV32I

  #703 opened 6 years ago by pavelkryukov
  2

• Add unit tests for exceptional cases of port initialization

  #504 opened 6 years ago by pavelkryukov
  0

• Handle overflows in MIPS shift-variable instructions (sllv/srlv/srav/dsllv/dsrlv/dsrav)

  #709 opened 6 years ago by pooh64
  1

• Extract BranchMispredictDetection unit out of Mem module to a separate module

  #724 opened 6 years ago by pavelkryukov
  2

• Add clear manual about MIPS unaligned load/stores

  #413 opened 7 years ago by pavelkryukov
  3

• Add nested loops example in MIPS assembler

  #577 opened 6 years ago by pavelkryukov
  2

• Implement interrupts

  #604 opened 6 years ago by pavelkryukov
  0

• Purge arithmetic `static_cast`s from our code

  #643 opened 6 years ago by pavelkryukov
  2

• Remove type-punning from MIPS instruction

  #465 opened 6 years ago by pavelkryukov
  3

• Remove FuncSimAndMemory and PerfSimAndMemory

  #660 opened 6 years ago by pavelkryukov
  1

• Add ctor of MIPS instruction from string

  #589 opened 6 years ago by pavelkryukov
  4

• Remove 'number_of_elements' in LRUCache and use size of hash table instead

  #563 opened 6 years ago by pavelkryukov
  3

• Share ownership of Simulator and FuncMemory instances

  #662 opened 6 years ago by pavelkryukov
  1

• Using `Simulator` instances in unit tests causes duplicated config keys

  #668 opened 6 years ago by trexxet
  3

• Implement or copy a bubble sort in MIPS assembler

  #599 opened 6 years ago by pavelkryukov
  1

• Rename 'complex pipeline' to 'multicycle ALU pipeline'

  #598 opened 6 years ago by pavelkryukov
  9

• Add unit tests for all BP modes

  #506 opened 6 years ago by pavelkryukov
  36

• Fix branch prediction modes

  #612 opened 6 years ago by pavelkryukov
  0

• Implement hardware watchpoint

  #591 opened 6 years ago by pavelkryukov
  0

• Submit a patch to GNU Binutils to make its code C99-compliant.

  #564 opened 6 years ago by pavelkryukov
  7

• Add loop interchange example trace

  #579 opened 6 years ago by pavelkryukov
  0

• Add MIPS assembler software prefetch example

  #578 opened 6 years ago by pavelkryukov
  0

• Perform cache line size study with variable cache miss latency

  #555 opened 6 years ago by pavelkryukov
  0

• Enhance cache line size study

  #451 opened 6 years ago by pavelkryukov
  3

• Latency and cycle literals should not start with uppercase letter

  #536 opened 6 years ago by pavelkryukov
  2

• Implement second level cache

  #490 opened 6 years ago by pavelkryukov
  0

• Add cache controlling instructions

  #471 opened 6 years ago by pavelkryukov
  0

• Two destination bypass

  #424 opened 7 years ago by pavelkryukov
  3

• Support 2 destinations

  #398 opened 7 years ago by pavelkryukov
  0