Pinned Repositories
verible
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
ECE143-Final-Project
"Difficulties in Learning Python" Final Project by Mahmoud Maarouf, Vidya Kanekal, Hamed Mojtahed, Kevin Anderson, and Songlin Chen,
emp-tool
IEEE-Winter-2020-QP-
Voltage Sensor Code for Piezoelectric Sensor Mat
IEEE-Winter-QP-2019---Sleep-Apnea-Detector
By Mahmoud Maarouf, Allan Tan, Casey Lee
TinyGarble2CircuitSynthesis
TinyGarbleCircuitSynthesis
Circuit Synthesis for Yao's Garbled Circuit by TinyGarble
slang
SystemVerilog compiler and language services
Digital-IDE
在vscode上的数字设计开发插件
MahmoudKMaarouf's Repositories
MahmoudKMaarouf/IEEE-Winter-QP-2019---Sleep-Apnea-Detector
By Mahmoud Maarouf, Allan Tan, Casey Lee
MahmoudKMaarouf/ECE143-Final-Project
"Difficulties in Learning Python" Final Project by Mahmoud Maarouf, Vidya Kanekal, Hamed Mojtahed, Kevin Anderson, and Songlin Chen,
MahmoudKMaarouf/emp-tool
MahmoudKMaarouf/IEEE-Winter-2020-QP-
Voltage Sensor Code for Piezoelectric Sensor Mat
MahmoudKMaarouf/TinyGarble2CircuitSynthesis
MahmoudKMaarouf/TinyGarbleCircuitSynthesis
Circuit Synthesis for Yao's Garbled Circuit by TinyGarble