chipsalliance/verible
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
C++NOASSERTION
Watchers
- chritchensVenice, Italy
- circuitbreak98
- corcoRiedel Communications Montréal
- drkostasUniversity of Tennessee, Knoxville
- eda-ricercatoreDesign Automation Renegades
- ee06b080
- eemailme
- fangismSan Jose, CA
- gratuxriStuttgart
- hailinzengBeijing, China
- helloworld1983
- HINATASDK
- hoaluvn
- hzellerSan Francisco
- jcoffee
- jevinskieLafayette, Indiana
- jhcloos
- JohnnyOpcodeToronto, Ontario, Canada
- jonmayergoogle@google
- kazt81LeapMind Inc.
- kgugalaAntmicro
- liwei46
- lvcargniniSamsung Semiconductor Inc. - DSRA/MSL/ R&D
- ly0Shenzhen, PRC
- MaksimKobzarRussia
- mithro@timvideos
- mlsxdx
- mriosrivas
- msfschaffnerGoogle
- qshanShanghai, China
- snsokolovUSA
- StarryLeoChina
- szarnekowindependent
- tgorochowik@antmicro
- unforgiven512Unforgiven Development
- wellington1993Hotsoft Informática @hotsoft-desenv2